A flash memory controller includes a processing circuit which is arranged for receiving a first command and a first portion address parameter, receiving a second command and a second portion address parameter, obtaining a complete address parameter by combining the first portion address parameter with the second portion address parameter, and performing a corresponding operation upon a flash memory according to the complete address parameter and a command type of the second command.

A flash memory controller includes a processing circuit which is arranged for receiving a first command and a first portion address parameter, receiving a second command and a second portion address parameter, obtaining a complete address parameter by combining the first portion address parameter with the second portion address parameter, and performing a corresponding operation upon a flash memory according to the complete address parameter and a command type of the second command.

Disclosed is a four-dimensional touch pad module including a touch pad, a division boundary layer divided into a center touch pad area and respective side touch pad areas; a side button for performing a corresponding side button function by pressing a side touch pad, an FPCB having a touch pad FPCB connection part and a side button contact point respectively formed thereon, and an upper/lower housing, enabling short-distance pointing to be performed alone via the center touch pad and enabling long-distance pointing to be performed in parallel via a combination of the center touch pad and the side touch pad.

Disclosed is a four-dimensional touch pad module including a touch pad, a division boundary layer divided into a center touch pad area and respective side touch pad areas; a side button for performing a corresponding side button function by pressing a side touch pad, an FPCB having a touch pad FPCB connection part and a side button contact point respectively formed thereon, and an upper/lower housing, enabling short-distance pointing to be performed alone via the center touch pad and enabling long-distance pointing to be performed in parallel via a combination of the center touch pad and the side touch pad.

A method for classifying a gesture made in proximity to a touch interface. A system receives data related to the position and/or movement of hand. The data is delimited by identifying a variable length window of touch frames. The variable length window of touch frames is selected to include touch frames indicative of feature data. The variable length window of touch frames is classified based upon classifications learned by the classifying module to identify gestures.

An information processing device performs control to record deletion information indicating that an object with a designated object ID has been deleted, on a recording medium, in a case where a specific object ID is designated and an instruction to delete the object is input, for a magnetic tape on which an object that includes data and metadata related to the data and that is assigned an object ID as identification information is recorded, the object being assigned an object ID in a case where the object is updated different from an object ID of the object before the update.

Techniques are disclosed for populating a region of an image with a plurality of brush strokes. For instance, the image is displayed, with the region of the image bounded by a boundary. A user input is received that is indicative of a user-defined brush stroke within the region. One or more synthesized brush strokes are generated within the region, based on the user-defined brush stroke. In some examples, the one or more synthesized brush strokes fill at least a part of the region of the image. The image is displayed, along with the user-defined brush stroke and the one or more synthesized brush strokes within the region of the image.

A configurable interface circuit is disclosed. An integrated circuit (IC) having a particular configuration. The IC includes a memory system and a communication fabric coupled to the memory system. The IC further includes a plurality of agent circuits configured to make requests to the memory system that are in a first format that is not specific to the particular configuration of the IC. A plurality of interface circuits is coupled between corresponding ones of the plurality of agent circuits and the communication fabric. A given one of the plurality of interface circuits is configured to receive a request to the memory system in the first format and output the request in a second format that is specific to the particular configuration of the IC.

A flash memory controller includes a processing circuit which is arranged for receiving a first command and a first portion address parameter, receiving a second command and a second portion address parameter, obtaining a complete address parameter by combining the first portion address parameter with the second portion address parameter, and performing a corresponding operation upon a flash memory according to the complete address parameter and a command type of the second command.

A flash memory controller includes a processing circuit which is arranged for receiving a first command and a first portion address parameter, receiving a second command and a second portion address parameter, obtaining a complete address parameter by combining the first portion address parameter with the second portion address parameter, and performing a corresponding operation upon a flash memory according to the complete address parameter and a command type of the second command.