A computing apparatus includes a transaction-record memory and a comparator. The transaction-record memory is to receive and store one or more sequences of transaction records, each transaction record including a unique transaction ID and a transaction payload. The comparator is to compare the payloads of transaction records having the same transaction ID, and to initiate a responsive action in response to a discrepancy between the compared transaction payloads.

The present disclosure relates to a method, a device, and a computer program product for managing a storage system. The storage system includes a first control node, a second control node, and a persistent storage device, the first control node being in an activated state, and the second control node being in a state of transfer from a non-activated state to an activated state. A method includes: loading a first list of page descriptors of the storage system to the second control node to generate a second list of page descriptors at the second control node, the first list including a portion of multiple page descriptors of the storage system that has been modified but has not been flushed to the persistent storage device; receiving a synchronization message from the first control node that indicates that the first list has been modified by the first control node; and updating the second list at the second control node based on the synchronization message. Further, a corresponding device and a corresponding program product are provided. With the example implementations of the present disclosure, the start performance of the control nodes in the storage system can be improved.

A graphics processing system for operation with a data store, comprising: one or more processing units for processing tasks; a check unit operable to form a signature which is characteristic of an output from processing a task on a processing unit; and a fault detection unit operable to compare signatures formed at the check unit; wherein the graphics processing system is operable to process each task first and second times at the one or more processing units so as to, respectively, generate first and second processed outputs, the graphics processing system being configured to: write out the first processed output to the data store; read back the first processed output from the data store and form at the check unit a first signature which is characteristic of the first processed output as read back from the data store; form at the check unit a second signature which is characteristic of the second processed output; compare the first and second signatures at the fault detection unit; and raise a fault signal if the first and second signatures do not match.

An information processing system includes: a first system that includes a group of arithmetic units, a controller, and an external device; and a second system configured to execute calculation which is the same as calculation executed in the first system and compare calculation results to each other, wherein the controller is configured to: stop a plurality of arithmetic units when it is detected that an output request to the external device is output from one or more arithmetic units among the plurality of arithmetic units that execute first calculation in the group of arithmetic units, the plurality of arithmetic units including one or more arithmetic units that does not output the output request, transmit first comparison target data including a value output in response to the output request to the second system, and instruct the stopped one or more arithmetic units to execute second calculation.

An operating method of a storage device that includes a nonvolatile memory device and a controller configured to control the nonvolatile memory device, the method including: detecting, by the controller, a fault of the nonvolatile memory device or the controller, notifying, by the controller, a host device of the fault, notifying, by the controller, the host device of one or more recovery schemes for recovering the fault, and recovering, by the controller, the fault in response to a recovery scheme selected by the host device.

Apparatuses, systems, and methods related to determination of a match between data values stored by three or more arrays are described. A system using the data values may manage performance of functions, including automated functions critical for prevention of damage to a product, personnel safety, and/or reliable operation, based on whether the data values match. For instance, one apparatus described herein includes a plurality of arrays of memory cells formed on a single memory chip. The apparatus further includes comparator circuitry configured to compare data values stored by three arrays selected from the plurality to determine whether there is a match between the data values stored by the three arrays. The apparatus further includes an output component configured to output data values of one of two arrays of the three arrays responsive to determination of the match between the data values stored by the two arrays.

Failure of a processing unit that processes a plurality of information pieces is discovered in a short time. An information processing device 100 including a processing unit 1 that processes a plurality of information pieces includes: an identifier assignment unit 2 that assigns identifiers 60000 to 61023 to the plurality of information pieces 40000 to 41023, respectively; a plurality of input memories 20000 to 21023 that retain the plurality of information pieces 40000 to 41023 and the identifiers 60000 to 61023 assigned to the plurality of information pieces 40000 to 41023, respectively; a plurality of output memories 30000 to 31023 that retain the plurality of information pieces 50000 to 51023 processed by the processing unit 1 and the identifiers 70000 to 71023 assigned to the plurality of processed information pieces 50000 to 51023, respectively; an identifier verification unit 3 that verifies the identifiers 70000 to 71023 by comparing the identifiers 70000 to 71023 with the identifiers 60000 to 61023, respectively; and an error handling unit 4 that performs error handling when identifiers do not match with each other.

Embodiments of the inventive concept include a plurality of memory ranks, a buffer chip including a rank remap control section configured to remap a rank from among the plurality of memory ranks of the volatile memory module responsive to a failure of the rank, and a dynamic serial presence detect section configured to dynamically update a stated total capacity of the volatile memory module based at least on the remapped rank. In some embodiments, a memory module includes a plurality of memory ranks, an extra rank in addition to the plurality of memory ranks, the extra rank being a spare rank configured to store a new page corresponding to a failed page from among the plurality of ranks, and a buffer chip including a page remap control section configured to remap the failed page from among the plurality of ranks to the new page in the extra rank.

An electronic control device includes a processing control unit and an information acquisition unit. The information acquisition unit collects external environment information and transfers the external environment information to the processing control unit, the processing control unit includes a first processor, a second processor, and a storage unit, the processing control unit executes arithmetic processing by a non-redundant processing configuration that executes non-redundant processing using the first processor and the second processor, and arithmetic processing by a redundant processing configuration that executes redundant processing using the first processor and the second processor, and the processing control unit stores a result of arithmetic processing by the non-redundant processing configuration in the storage unit, individually performs arithmetic processing using the stored result in both the first processor and the second processor by arithmetic processing by the redundant processing configuration, and performs determination for an arithmetic processing result by the non-redundant processing configuration based on an arithmetic result by the first processor and an arithmetic result by the second processor.

Systems and methods for monitoring a plurality of mailboxes by a plurality of computer nodes. The plurality of computer nodes comprises a first computer node and a second computer node. The first computer node is configured to detect an update to a database record associated with a message store; determine, in response to detecting the update to the database record, a second computer node in the plurality of computer nodes to monitor the message store, based at least in part on an attribute stored in the database record; and update the database record to store an identifier corresponding to the second computer node. The second computer node is configured to: detect the update to the database record by the first computer node based at least in part on the identifier; and configure a monitoring process for the message store based, at least in part, on the attribute stored in the database record.