A method may include, in a computing device comprising at least one processor and a memory, generating at least one information beacon from each of a plurality of applications installed on the computing device. Each information beacon may include application analytics data associated with a corresponding application while the corresponding application is running on the computing device. The at least one information beacon from each of the plurality of applications may be stored in a common location in the computing device. The stored at least one information beacon may be dispatched from each of the plurality of applications to a network device communicatively coupled to the computing device. The generating may be triggered by beacon generation code implemented in each of the plurality of applications installed on the computing device.

Methods, non-transitory storage medium, and systems for generating an aggregated list of problem conditions associated with blade servers to facilitate efficient debugging thereof. In a blade server environment, each chassis is equipped with a chassis management module and each blade in each chassis is associated with a blade management controller. A data map representing the relationships between the blade servers and the shared resources is utilized by a chassis management module to aggregate and link problem conditions sensed by any of the blade management controllers.

Computing systems, devices, and methods for performing a virtual load test are disclosed herein. In accordance with the present disclosure, an asset data platform may define a respective range of acceptable values for each load-test variable in a set of load-test variables. The asset data platform may then receive one or more under-load reports from a given asset, and carry out a virtual load test for the given asset by, performing a comparison between the respective observation value for the load-test variable included in the most recent under-load report and the respective range of acceptable values for the load-test variable. In turn, the asset data platform may identify load-test variables for which the respective observation value falls outside of the respective range of acceptable values, and may then cause a client station to present results of the virtual load test for the given asset.

Systems and methods for determining the integrity of metrology systems are provided. A method according to one implementation includes the step of storing, with a computer having a system clock, an initialization time at which a device is connected to the computer. The method also includes receiving, with the computer, information obtained by the device and associating an electronic timestamp to the information. The electronic timestamp is based on the system clock when the computer receives the information obtained by the device. The method also includes counting clock cycles to determine an elapsed time from the initialization time to the time when the computer receives the information obtained by the device. Also, the method determines if the system clock has been altered by comparing the electronic timestamp to the sum of the initialization time and the elapsed time.

An information processing device includes a processor configured to perform a diagnosis of hardware of the information processing device. The processor is configured to generate plural pieces of failure information. The plural pieces of failure information are classified into groups corresponding to different importance levels. The processor is configured to store the plural pieces of failure information in consecutive storage areas. The consecutive storage areas are divided into storage sections corresponding to the respective groups in order of importance level. The processor is configured to store first piece of failure information in a head of a second storage section in absence of free areas in first storage section. The first storage section is secured for a first group including the first piece of failure information. The second storage section is secured for a second group corresponding to a second importance level lower than the first importance level by one level.

Embodiments of the present disclosure provide a memory test method and a device thereof, an electronic device, and a computer-readable storage medium, which relate to the field of semiconductor device testing technologies. The method is executed by a built-in self-test circuit and includes: acquiring defect information of a first memory by testing the first memory; acquiring repair information of the first memory based on the defect information of the first memory; and storing the repair information of the first memory in a second memory.

A verification system of a basic input output system and a verification method thereof are provided. The verification system includes a server, a microcontroller, and a verification device. The server includes a platform controller hub and the basic input output system. The server outputs a log file of the basic input output system by a system management bus controller in the platform controller hub. The microcontroller is coupled to the server. The microcontroller receives the log file and converts the log file into a readable character. The verification device is coupled to the microcontroller. The verification device receives and displays the readable character.

Aspects of the present disclosure provide techniques and apparatus for testing a mixed safety system, such as system included in a vehicle. An example method of operating a vehicle includes operating an electronic control unit (ECU) in a first state; detecting one or more criteria being satisfied to perform a test associated with the ECU; and performing the test associated with the ECU in response to detecting the one or more criteria being satisfied, while the ECU is in a second state different from the first state.

Embodiments of the invention are directed to computer-implemented methods, computer systems, and computer program products for testing hardware. The method includes reading a stream of test instructions. The method further includes determining if test instruction exceptions present in the stream of test instructions. The method further includes inserting an interrupt into the test instruction stream for each determined test instruction exception. The method further includes generating one or more error messages for each determined test instruction exception.

Embodiments of the invention are directed to computer-implemented methods, computer systems, and computer program products for testing hardware. The method includes reading a stream of test instructions. The method further includes determining if test instruction exceptions present in the stream of test instructions. The method further includes inserting an interrupt into the test instruction stream for each determined test instruction exception. The method further includes generating one or more error messages for each determined test instruction exception.