Automatic voltage reconfiguration in a computer processor including one or more cores includes executing one or more user-specified workloads; determining, based on the user-specified workloads, a respective minimum safe voltage for each core of one or more cores; and modifying a respective voltage configuration for each core of the one or more cores based on the respective minimum safe voltage.

A testing tool includes a clock generation circuit generating a test clock and outputting the test clock via a test clock output pad, data processing circuitry clocked by the test clock, and data output circuitry receiving data output from the data processing circuitry and outputting the data via an input/output (IO) pad, the data output circuitry being clocked by the test clock. The testing tool also includes a programmable delay circuit generating a delayed version of the test clock, and data input circuitry receiving data input via the IO pad, the data input circuitry clocked by the delayed version of the test clock. The delayed version of the test clock is delayed to compensate for delay between transmission of a pulse of the test clock via the test clock output pad to an external computer and receipt of the data input from the external computer via the IO pad.

In various examples, one or more components or regions of a processing unit—such as a processing core, and/or component thereof—may be tested for faults during deployment in the field. To perform testing while in deployment, the state of a component subject to test may be retrieved and/or stored during the test to maintain state integrity, the component may be clamped to communicatively isolate the component from other components of the processing unit, a test vector may be applied to the component, and the output of the component may be compared against an expected output to determine if any faults are present. The state of the component may be restored after testing, and the clamp removed, thereby returning the component to its operating state without a perceivable detriment to operation of the processing unit in deployment.

The disclosure describes a method of monitoring the dynamic power consumption of ReRAM crossbars and determines the occurrence of faults when a changepoint is detected in the monitored power-consumption time series. Statistical features are computed before and after the changepoint and train a predictive model using machine-learning techniques. In this way, the computationally expensive fault localization and error-recovery steps are carried out only when a high fault rate is estimated. With the proposed fault-detection method and the predictive model, the test time is significantly reduced while high classification accuracy for well-known AI/ML datasets using a ReRAM-based computing system (RCS) can still be ensured.

A tool may identify and revert changes that caused network hardware components or hardware servers to malfunction. The tool builds and maintains a graph that represents the hardware components and servers in the system and their dependencies. When a change is made to the system, links and weights in the graph are adjusted to account for the changes. When a component or server is reported as malfunctioning, the tool traverses the graph to locate the changes that are the most likely root causes of the malfunction. The tool may then revert the change to resolve the malfunction.

A tool may identify and revert changes that caused network hardware components or hardware servers to malfunction. The tool builds and maintains a graph that represents the hardware components and servers in the system and their dependencies. When a change is made to the system, links and weights in the graph are adjusted to account for the changes. When a component or server is reported as malfunctioning, the tool traverses the graph to locate the changes that are the most likely root causes of the malfunction. The tool may then revert the change to resolve the malfunction.

A method and an apparatus for performing a test for a CPU, and an electronic device. A decay command in a SETWP test and a command-executing duration corresponding to each command subsequent to the decay command can be automatically deployed. Thereby, the SETWP test is correctly performed for the CPU to obtain a test result. It is not necessary to rely on manual adjustment on a parameter of a delay corresponding to each command.

A computer system includes a circuit board, one or more connectors/sockets and a first controller. The connectors/sockets are disposed on the circuit board. The first controller is configured to receive information corresponding to parameters of the circuit board and/or the connectors/sockets before booting up the computer system to run an operating system (OS).

A stand-alone bridging test method is provided, which is applied to a stand-alone bridging device. The stand-alone bridging device is coupled to a storage device. The stand-alone bridging device includes a bridging controller. The storage device includes a device controller and a device memory. The stand-alone bridging test method includes the bridging controller generates a handshaking test signal and transmits the handshaking test signal to the device controller. The device controller generates a confirmation test signal according to the handshaking test signal and transmits the confirmation test signal to the bridging controller. The bridging controller generates a test data according to the confirmation test signal and transmits a write command to the device controller to write the test data into the device memory. The bridging controller transmits a read command to the device controller to read a stored data of the device memory.

Automatic voltage reconfiguration in a computer processor including one or more cores includes executing one or more user-specified workloads; determining, based on the user-specified workloads, a respective minimum safe voltage for each core of one or more cores; and modifying a respective voltage configuration for each core of the one or more cores based on the respective minimum safe voltage.