A system and method for a virtual processor base/virtual execution context arrangement. The disclosed arrangement utilizes chiplets comprising core logic and defined instruction sets. The chiplets are adapted to operate in conjunction with one or more active execution contexts to enable the execution of particular processes. In particular, the defined instruction sets includes a instructions for processor debugging. The system and method support the compartmentalization of such debugging instructions so as to provide enhanced processor and process security.

A system and method for a virtual processor base/virtual execution context arrangement. The disclosed arrangement utilizes chiplets comprising core logic and defined instruction sets. The chiplets are adapted to operate in conjunction with one or more active execution contexts to enable the execution of particular processes. In particular, the defined instruction sets includes a instructions for processor debugging. The system and method support the compartmentalization of such debugging instructions so as to provide enhanced processor and process security.

Various embodiments provide for failure mode analysis of a circuit design, which can be used as part of electronic design automation (EDA). In particular, some embodiments provide for failure mode analysis of a circuit design by determining a set of functional primitives of a circuit design component (e.g., cell at gate level) that contribute to a root cause logic for a specific failure mode.

Embodiments for simulating timing-related error conditions in a distributed system, by allowing a user to define a fault map specifying one or more faults to be committed by components in the distributed system. These generated fault events are to be executed in different components of the distributed system in a serialized distributed order. An event injection process delivers the fault map messages to the nodes in the distributed system, and the nodes then execute an operation sequence containing the fault events in the proper order as coordinated by the event injection process. The faults are then committed by the associated components in the nodes. Execution of these fault events occurs before, after or during a regular component procedure or action to simulate the desired timing-related error.

Embodiments for simulating timing-related error conditions in a distributed system, by allowing a user to define a fault map specifying one or more faults to be committed by components in the distributed system. These generated fault events are to be executed in different components of the distributed system in a serialized distributed order. An event injection process delivers the fault map messages to the nodes in the distributed system, and the nodes then execute an operation sequence containing the fault events in the proper order as coordinated by the event injection process. The faults are then committed by the associated components in the nodes. Execution of these fault events occurs before, after or during a regular component procedure or action to simulate the desired timing-related error.

A system and method for representing events that occur in a real world deployment is described. A real-world workload including multiple events is identified. Multiple characteristics of the real-world workload are converted into multiple endpoint simulator workloads. Multiple gateway hardware characteristics are converted into a modeling elements for simulated Internet of things (IoT) networks. Further, a simulation is performed for each of the endpoint simulator workloads on each of the simulated IoT networks. Also, statistics are collected about the performance of the simulated IoT networks for the endpoint simulator workloads.

A system performs group testing on a population of items. The group testing identifies items satisfying particular criteria from a population of items, for example, defective items from the population. The group testing may be performed for software or hardware testing, for testing a human population, for training of deep learning applications, and so on. The system trains a machine learning based model, for example, a reinforcement learning based model to evaluate groups. The model may further determine system dynamics that may represent priors of items. An agent treats the population and groups of items being tested as the environment and performs actions, for example, adjusting the groups. The system also performs a non-adaptive strategy based on monte carlo simulation of tests based on a simulation results.

Example techniques may be implemented as a method, a system or more non-transitory machine-readable media storing instructions that are executable by one or more processing devices, Operations performed by the example techniques include obtaining data representing results of tests executed by one or more test instruments on an initial set of devices under test (DUTs) in a test system; and using the data to train a machine learning model. The machine learning model is for predicting which of the tests will produce failing results for a different set of DUTs. DUTs in the different set have one or more features in common with DUTs in the initial set.

Example techniques may be implemented as a method, a system or more non-transitory machine-readable media storing instructions that are executable by one or more processing devices, Operations performed by the example techniques include obtaining data representing results of tests executed by one or more test instruments on an initial set of devices under test (DUTs) in a test system; and using the data to train a machine learning model. The machine learning model is for predicting which of the tests will produce failing results for a different set of DUTs. DUTs in the different set have one or more features in common with DUTs in the initial set.

A testing and verification system for an equivalent physical configuration of an in-flight entertainment and communications system with one or more hardware components includes a virtual machine manager. One or more virtual machines each including a hardware abstraction layer is instantiated by the virtual machine manager according to simulated hardware component definitions corresponding to the equivalent physical configuration of the hardware components. The virtual machines are in communication with each other over virtual network connections. A test interface to the one or more virtual machines generate test inputs to target software applications installed on the virtual machines. A display interface is connected to the virtual machines, with results from the execution of the target software applications responsive to the test inputs are output thereto.