A computer device includes a central processing unit (CPU), a network adapter, a bus, and an intermediate device, where the intermediate device is coupled to both the CPU and the network adapter through the bus, and is configured to establish a correspondence between address information of an agent unit and address information of a function unit, and implement forwarding of a packet between the CPU and the network adapter based on the correspondence.

A wake-up control method for a Body Control Module (BCM) includes: step S1 writing IDs and wake-up level information of all Micro Controller Unit (MCU) pins serving as an external wake-up source to a retention RAM; step S2, setting a wake-up detection timer, and triggering a system to enter a low power consumption mode; step S3, after a wake-up detection time set by the wake-up detection timer expires, enabling power supply to all MCU pins, setting the corresponding MCU pin as an input pin according to the pin ID information written in step S1, and acquiring level information of the input pin; and step S4, comparing the level information of the input pin with the wake-up level information written in step S1, if they are consistent, writing the ID of the input pin that is to serve as a wake-up source to the retention RAM and triggering the system to enter a normal operating mode, and if they are inconsistent, disabling the power supply to the MCU pin. A wake-up control device for a BCM is further provided. The wake-up control method and the wake-up control device for a BCM reduce selection requirements for MCU chips, and provide more flexible hardware pin allocation and design for a wake-up source.

A computer system, remote control monitoring system, and remote control monitoring method are provided to instantly provide the local display screen of the local computer to the remote computer for remote real-time display. The remote control monitoring system is arranged in the local computer and has a signal receiver and a remote controller. The signal receiver receives the video signal from the processor, executes the signal transforming process to generate the video signal in different standards. The remote controller executes a network compressing process on the transformed video signal to generate the network transportable video data, and transmits the data to the remote computer for displaying the corresponding remote display screen on the remote computer. The present disclosure enables the implementing of the out-of-band remote displaying.

A method of processing in-memory commands in a high-bandwidth memory (HBM) system includes sending a function-in-HBM instruction to the HBM by a HBM memory controller of a GPU. A logic component of the HBM receives the FIM instruction and coordinates the instructions execution using the controller, an ALU, and a SRAM located on the logic component.

Aspects include receiving, at an input/output (I/O) processor, a transport control word (TCW) that includes an instruction to perform physical port mirroring. It is identified, by the I/O processor, a first port to be mirrored and a second port to perform the mirroring. The second port is a physical port on a host bus adapter (HBA). In response to outbound data being sent to the first port for transmission to a first target device and to the instruction specifying outbound port mirroring, the I/O processor sends a copy of the outbound data to a second target device via the second port. In response to receiving inbound data at the first port and to the instruction specifying inbound port mirroring, a copy of the inbound data is transmitted to the second target device via the second port.

An apparatus, system, and method for detecting compromised firmware in a non-volatile storage device. A control bus of a non-volatile storage device is monitored. The non-volatile storage device includes a processor and electronic components coupled to the control bus. Signal traffic on the control bus is analyzed for events and/or triggers related to storage operations initiated on the control bus by the processor. Storage operations include one or more commands directed to at least one of the electronic components. If the latency for the storage operation satisfies an alert threshold a host is notified of compromised firmware.

An audible beacon system includes an audible beacon chassis. A port connector is included on the audible beacon chassis and is configured to connect to a port on a computing device. An audible beacon device is coupled to the audible beacon chassis. An audible beacon driver device is included in the audible beacon chassis, is accessible via the port connector, and is configured to drive the audible beacon device to cause the audible beacon device to generate an audible sound. A storage device is included in the audible beacon chassis, is accessible via the port connector, and includes information that is configured to allow a computing device that is connected to the port connector to access the audible beacon driver device and cause the audible beacon driver device to drive the audible beacon device.

The present disclosure includes apparatuses and methods for bank to bank data transfer. An example apparatus includes a plurality of banks of memory cells, an internal bus configured to transfer data between the plurality of banks and an external bus interface, and a bank-to-bank transfer bus configured to transfer data between the plurality of banks.

I/O network modules connect field devices to a process control network. Each I/O network module includes a set of electrical connectors for connecting a field device to the module and an I/O channel extending from the set of electrical connectors to a network port. The I/O channel includes a conversion circuit that converts between an I/O signal and network-compatible signals. Each I/O channel connected to the process control network through an I/O network module is associated with its own unique network address. This enables controllers and field devices on the process control network to communicate essentially directly with one another through the network.

Systems and methods provide for optimizing utilization of an Address Translation Cache (ATC). A network interface controller (NIC) can write information reserving one or more cache lines in a first level of the ATC to a second level of the ATC. The NIC can receive a request for a direct memory access (DMA) to an untranslated address in memory of a host computing system. The NIC can determine that the untranslated address is not cached in the first level of the ATC. The NIC can identify a selected cache line in the first level of the ATC to evict using the request and the second level of the ATC. The NIC can receive a translated address for the untranslated address. The NIC can cache the untranslated address in the selected cache line. The NIC can perform the DMA using the translated address.