Access control lookups may be implemented that support user-configurable and host-configurable processing stages. A request may be received and evaluated to determine whether bypass of user-configured access request processing stages should be bypassed. A lookup may be determined for user-configured access controlled decisions, and the access control decisions can be applied, if not bypassed. A lookup may be determined for a host-configured access control decisions and the access control decisions applied.

Access control lookups may be implemented that support user-configurable and host-configurable processing stages. A request may be received and evaluated to determine whether bypass of user-configured access request processing stages should be bypassed. A lookup may be determined for user-configured access controlled decisions, and the access control decisions can be applied, if not bypassed. A lookup may be determined for a host-configured access control decisions and the access control decisions applied.

Provided is a FPGA-based design method for equally dividing an interval, including the following steps: dividing the oscillation periods of a second pulse signal of a crystal oscillator clock of a FPGA board by the number of equally divided sampling pulses, and obtaining the remainder thereof; dividing the remainder by the number of the equally divided sampling pulses to serve as an error within each sampling interval; using a counter to count from the second pulse, and stopping the counting of the counter once whenever the error within the sampling interval, which is accumulated within the second pulse interval, is greater than or equal to the vibration period. Further provided is a FPGA-based design device for equally dividing an interval. The present application makes full use of the feature of interval equal division calculation, has high precision, and is easy to implement.

Provided is a FPGA-based design method for equally dividing an interval, including the following steps: dividing the oscillation periods of a second pulse signal of a crystal oscillator clock of a FPGA board by the number of equally divided sampling pulses, and obtaining the remainder thereof; dividing the remainder by the number of the equally divided sampling pulses to serve as an error within each sampling interval; using a counter to count from the second pulse, and stopping the counting of the counter once whenever the error within the sampling interval, which is accumulated within the second pulse interval, is greater than or equal to the vibration period. Further provided is a FPGA-based design device for equally dividing an interval. The present application makes full use of the feature of interval equal division calculation, has high precision, and is easy to implement.

Systems or methods of the present disclosure may provide a programmable logic device including a network-on-chip (NoC) to facilitate data transfer between one or more main intellectual property components (main IP) and one or more secondary intellectual property components (secondary IP). To reduce or prevent excessive congestion on the NoC, the NoC may include one or more traffic throttlers that may receive feedback from a data buffer, a main bridge, or both and adjust data injection rate based on the feedback. Additionally, the NoC may include a data mapper to enable data transfer to be remapped from a first destination to a second destination if congestion is detected at the first destination.

Systems or methods of the present disclosure may provide a programmable logic device including a network-on-chip (NoC) to facilitate data transfer between one or more main intellectual property components (main IP) and one or more secondary intellectual property components (secondary IP). To reduce or prevent excessive congestion on the NoC, the NoC may include one or more traffic throttlers that may receive feedback from a data buffer, a main bridge, or both and adjust data injection rate based on the feedback. Additionally, the NoC may include a data mapper to enable data transfer to be remapped from a first destination to a second destination if congestion is detected at the first destination.

The following description is directed to a logic repository service supporting adaptable host logic. In one example, a method of a logic repository service can include receiving a first request to generate configuration data for configurable hardware using a specification for application logic. The method can include selecting a particular host logic shell from a group of host logic shells. The particular host logic shell can be used to encapsulate the application logic when the configurable hardware is configured. Configuration data for the configurable hardware can be generated. The configuration data can include data for implementing the application logic and at least a portion of the particular host logic shell. The method can include receiving a second request to download the configuration data to a host server computer comprising the configurable hardware. The configuration data can be transmitted to the host server computer in response to the second request.

The following description is directed to a logic repository service supporting adaptable host logic. In one example, a method of a logic repository service can include receiving a first request to generate configuration data for configurable hardware using a specification for application logic. The method can include selecting a particular host logic shell from a group of host logic shells. The particular host logic shell can be used to encapsulate the application logic when the configurable hardware is configured. Configuration data for the configurable hardware can be generated. The configuration data can include data for implementing the application logic and at least a portion of the particular host logic shell. The method can include receiving a second request to download the configuration data to a host server computer comprising the configurable hardware. The configuration data can be transmitted to the host server computer in response to the second request.

A control device including: a determination unit that determines whether or not a malfunction has occurred in a monitoring target on the basis of a state of the monitoring target; an arithmetic unit that is capable of reconfiguring a function; a storage unit that stores software used for causing the arithmetic unit to reconfigure a function relating to an operation of the monitoring target; and a processing unit that reads the software from the storage unit and reflects the software on the arithmetic unit in a case in which it is determined by the determination unit that a malfunction has occurred in the monitoring target.

A control device including: a determination unit that determines whether or not a malfunction has occurred in a monitoring target on the basis of a state of the monitoring target; an arithmetic unit that is capable of reconfiguring a function; a storage unit that stores software used for causing the arithmetic unit to reconfigure a function relating to an operation of the monitoring target; and a processing unit that reads the software from the storage unit and reflects the software on the arithmetic unit in a case in which it is determined by the determination unit that a malfunction has occurred in the monitoring target.