A method for designing a circuit element of an integrated circuit (IC) includes receiving one or more desired characteristics of the circuit element from user input and iteratively determining a design solution through one or more simulations and modifications using a rule-set. The one or more desired characteristics are combined with other preset characteristics of the circuit element or the IC. A first model of the circuit element is defined and simulated to calculate performance. The first and subsequent models are modified by drawing on a rule-set of expert knowledge relating to general dependency of at least one design criterion, such as a physical, geometrical or performance characteristic, with another design criterion.

A design structure for an integrated radio frequency (RF) filter on a backside of a semiconductor substrate includes: a device on a first side of a substrate; a radio frequency (RF) filter on a backside of the substrate; and at least one substrate conductor extending from the front side of the substrate to the backside of the substrate and electrically coupling the RF filter to the device.

Disclosed are methods and systems for by identifying or generating an electrical schematic, generating a thermal schematic by associating thermal RC circuits of the electronic design with the electrical schematic, performing at least two analyses of an electrical analysis, a thermal analysis, and an electromagnetic interference compliance (EMC) analysis with the electrical schematic and the thermal schematic of the electronic design. The electrical, thermal, and EMC analyses may be performed concurrently by forwarding intermediate or final analysis results to each other, and the analysis results may be presented simultaneously in one or more user interface windows. The thermal schematic may be obtained by extracting the thermal RC circuits, identifying corresponding electrical circuit components that correspond to the extracted thermal RC circuits, and importing the thermal RC circuits into the electrical schematic so that the electrical and thermal schematics have the same nodes.

Systems and methods for segmenting an impedance matching model are described. One of the methods includes receiving the impedance matching model. The impedance matching model represents an impedance matching circuit, which is coupled to an RF generator via an RF cable and to a plasma chamber via an RF transmission line. The method further includes segmenting the impedance matching model into two or more modules of a first set. Each module includes a series circuit and a shunt circuit. The shunt circuit is coupled to the series circuit. The series circuit of the first module is coupled to a cable model and the series circuit of the second module is coupled to an RF transmission model. The series circuit and the shunt circuit of the first module are coupled to the series circuit of the second module. The shunt circuit of the second module is coupled to the RF transmission model.

A filter includes: a first resonator and a second resonator; a first strip-shaped conductor which is provided on a dielectric layer provided on a surface of a first wide wall of the first resonator; a first conductor pin which is electrically connected to a first end of the first strip-shaped conductor; a second strip-shaped conductor which is provided on a dielectric layer provided on a surface of a first wide wall of the second resonator; and a second conductor pin which is electrically connected to a first end of the second strip-shaped conductor.

Disclosed is an antenna device or the like having a split ring resonator that adapts to different frequency bands. An antenna device has a laminated structure that is composed by alternating dielectric layers (DL) (35) and conductor layers (CL) and that includes a plurality of structures each comprising: a first split ring (first SR) (31) that is formed in a first conductor layer (first CL) (36A) extending along one surface of a DL (35), surrounds an opening (2) and has a first split (first SP) (51) formed in a circumferential portion along the opening (2); a second split ring (second SR) (32) that is formed in a second conductor layer (second CL) (36B), which extends along the other surface of the DL (35), in such a manner that the second SR (32) is opposed to the first SR (31), the second SR (32) surrounding the opening (2) and having a second split (second SP) (52) formed in a circumferential portion along the opening (2); a plurality of conductor vias (CVs) (3) that are circumferentially formed at intervals, sandwich the first SP (51) and second SP (52) and electrically connect the first SR (31) to the second SR (32); and a feeder line (4) that is formed in a particular one of the CLs and has one end electrically connected to at least one of the CVs (3) and the other end insulated from the particular CL by a clearance (39) formed in the particular CL along the extending direction of the particular CL.

A system and method for designing an electrical component comprises a model extraction engine configured to generate a model based on a set of parameters, a simulator configured to simulate the generated model and measure performance, a rule-set usable to determine changes to the set of parameters, and an inference engine configured to change salience values of expert rules included in the rule set. The salience value determines when and if an expert rule is used to change the set of parameters. One or more microprocessors are configured to determine design characteristics of the electrical component by iteratively performing, until measured performance is within tolerance, the steps of generating a model based on an updated version of the set of parameters, simulating the generated model, measuring performance of the generated model, and updating the set of parameters using the rule-set if the measured performance is not within the predefined tolerance.

To determine a three-dimensional layout of electrical connections of an electric component, a processor executes a path optimization routine to determine three-dimensional routes for a plurality of electrical connections of the electric component. A conflict management is performed to generate conflict-free three-dimensional routes for the plurality of electrical connections.

A voltage-controlled oscillator (VCO), includes a resonator circuit connected to receive an input voltage and having a first output node and a second output node; and at least one cross-coupled switching circuit portion, each cross-coupled switching circuit portion comprising a first transistor having a drain connected to the first output node and a second transistor having a drain connected to the second output node, the first transistor having a gate connected between the drain of the second transistor and the second output node and the second transistor having a gate connected between the drain of the first transistor and the first output node, each of the first and second transistors having a threshold voltage that is determined to be the highest threshold voltage available for the process used to create the VCO.

Techniques for generating one or more non-final layouts for an analog integrated circuit are disclosed. The techniques include generating a non-final layout of an analog integrated circuit based on device specifications, partitioning the non-final layout into a plurality of sub-cells, merging the verified sub-cells to form a merged layout of the analog integrated circuit, and performing quality control checks on the merged layout. Additionally or alternatively, generating the non-final layout can include determining an allowable spacing between adjacent cells of different cell types or inserting one or more filler cells into a filler zone in the non-final layout.