Electronic-photonic packages and related fabrication methods are described. A package may include a plurality of photonic integrated circuits (PICs), where each PIC comprises a photonic accelerator configured to perform matrix multiplication in the optical domain. The package may further include an application specific integrated circuit (ASIC) configured to control at least one of the photonic accelerators. The package further includes an interposer. The plurality of PICs are coupled to a first side of the interposer and the ASIC is coupled to a second side of the interposer opposite the first side. A first thermally conductive member in thermal contact with at least one of the PICs. The first thermally conductive member may include a heat spreader. A second thermally conductive member in thermal contact with the ASIC. The second thermally conductive member may include a lid. The first thermally conductive member faces the first side of the interposer, and the second thermally conductive member faces the second side of the interposer. In some embodiments, the interposer sits in part on a substrate and in part on the PICs.

A system displays a visual representation of the operation of an electronic circuit. The position of graphical elements representing values of signals in the circuit convey information about the operation of the circuit. The visual representation may further depict navigable levels of hierarchy of the electronic circuit.

A design for an analog mixed-signal (AMS) circuit is accessed. An assertion for verifying the behavior of an analog signal in the AMS circuit is also accessed. The assertion is expressed in an assertion language for AMS circuits. A processor verifies the assertion against the predicted behavior of the analog signal in the AMS circuit. In various embodiments, the assertion language contains predefined classes for assertions in the temporal domain, for assertions in the frequency domain, and for assertions based on functional dependencies of an output analog signal on an input analog signal.

A design for an analog mixed-signal (AMS) circuit is accessed. An assertion for verifying the behavior of an analog signal in the AMS circuit is also accessed. The assertion is expressed in an assertion language for AMS circuits. A processor verifies the assertion against the predicted behavior of the analog signal in the AMS circuit. In various embodiments, the assertion language contains predefined classes for assertions in the temporal domain, for assertions in the frequency domain, and for assertions based on functional dependencies of an output analog signal on an input analog signal.

The present disclosure describes a digital signal processing (DSP) block that includes a plurality of columns of weight registers and a plurality of inputs configured to receive a first plurality of values and a second plurality of values. The first plurality of values is stored in the plurality of columns of weight registers after being received. Additionally, the DSP block includes a plurality of multipliers configured to simultaneously multiply each value of the first plurality of values by each value of the second plurality of values.

The present disclosure describes a digital signal processing (DSP) block that includes a plurality of columns of weight registers and a plurality of inputs configured to receive a first plurality of values and a second plurality of values. The first plurality of values is stored in the plurality of columns of weight registers after being received. Additionally, the DSP block includes a plurality of multipliers configured to simultaneously multiply each value of the first plurality of values by each value of the second plurality of values.

A system can include a nonlinear circuit and a voltage decoder. The nonlinear circuit can perform an operation on an input voltage. The operation can be changed. A voltage decoder can be communicatively coupled to the nonlinear circuit for receiving an output voltage from the nonlinear circuit that results from the operation performed on the input voltage. The voltage decoder can compare the output voltage to a threshold voltage and determine a result of the operation.

A system can include a nonlinear circuit and a voltage decoder. The nonlinear circuit can perform an operation on an input voltage. The operation can be changed. A voltage decoder can be communicatively coupled to the nonlinear circuit for receiving an output voltage from the nonlinear circuit that results from the operation performed on the input voltage. The voltage decoder can compare the output voltage to a threshold voltage and determine a result of the operation.

A method, a system, and a non-transitory computer readable medium for simulating a circuit are provided. The method includes generating a digital simulation file for the circuit that includes a block, generating a mixed simulation file for the circuit, generating a waveform file by executing the digital simulation file for a first time window of a simulation, determining a plurality of analog values for the block based on the waveform file, and executing, by a processor, the mixed simulation file for a second time window of the simulation with the plurality of analog values annotated to the block at a start of the second time window. The digital simulation file corresponds to the block in a digital view and the mixed simulation file corresponds to the block in an analog view.

A hybrid automatic level control (ALC) system for controlling analog outputs. Within the ALC, a feedback loop passes from an analog circuit to a digital circuit and may provide the level of the analog output to the digital circuit. The digital circuit may use lookup tables to model the responses of analog devices but without associated errors and complications of the analog domain. Some examples of the modeled response include linear frequency responses of analog diodes and frequency responses of analog filters. Based on the received feedback and using the lookup tables modeling the responses, the digital circuit may drive a digital-to-analog converter interfacing the analog circuit to control the level of the analog output.