A hybrid automatic level control (ALC) system for controlling analog outputs. Within the ALC, a feedback loop passes from an analog circuit to a digital circuit and may provide the level of the analog output to the digital circuit. The digital circuit may use lookup tables to model the responses of analog devices but without associated errors and complications of the analog domain. Some examples of the modeled response include linear frequency responses of analog diodes and frequency responses of analog filters. Based on the received feedback and using the lookup tables modeling the responses, the digital circuit may drive a digital-to-analog converter interfacing the analog circuit to control the level of the analog output.

A computer-implemented method is provided including instantiating an object of an analog information model object class definition defining a net interface to a digital circuit simulator, and a plurality of analog circuit properties. The method includes connecting the net interface of the data structure to a first net defined in a digital circuit simulation and identifying all other instances of the AIM object class definition connected to the first net defined in the digital circuit simulation of a simulated digital circuit and determining an analog voltage at and current through the first net based on the analog circuit properties of all instances connected to the first net.

A method, apparatus, computer device, and storage medium for automatic design of analog circuits based on tree structure. The method includes: setting the maximum height and growth direction of the tree structure; randomly calling the node from the function node library as the parent node; randomly calling the node from the function node library and the port node library as the child according to the growth direction node; if the child node is a terminal node, generating a tree structure; checking the tree structure, if the tree structure satisfies the preset conditions, obtaining the circuit topology and device parameter that conform to the circuit rules; evolving the circuit topology and device parameter to generate an analog circuit. The embodiments achieve the effect of making the tree structure of the designed analog circuit more reasonable.

A method, apparatus, computer device, and storage medium for automatic design of analog circuits based on tree structure. The method includes: setting the maximum height and growth direction of the tree structure; randomly calling the node from the function node library as the parent node; randomly calling the node from the function node library and the port node library as the child according to the growth direction node; if the child node is a terminal node, generating a tree structure; checking the tree structure, if the tree structure satisfies the preset conditions, obtaining the circuit topology and device parameter that conform to the circuit rules; evolving the circuit topology and device parameter to generate an analog circuit. The embodiments achieve the effect of making the tree structure of the designed analog circuit more reasonable.

Systems and methods for generating a virtual environment for implementing an integrated photonics assembly are presented. An example system can include one or more processors and a memory coupled with the processors, where the processor executes a plurality of modules stored in the memory. The plurality of modules can include a user interface module for deploying one or more virtual photonic integrated subcircuits within the virtual environment, in which the virtual environment is configured to enable coupling of at least two virtual photonic integrated subcircuits. The coupling of the virtual photonic integrated subcircuits can form a virtual integrated photonics assembly. The modules can include a library module comprising a plurality of virtual photonic integrated subcircuits. One or more virtual photonic integrated subcircuits can include a performance characteristic. The performance characteristic can represent a real-world performance characteristic of a pre-fabricated physical photonic integrated subcircuit corresponding to the virtual photonic integrated subcircuit.

An embodiment discloses an apparatus for controlling a camera module, including a parameter generation unit configured to generate a parameter entity group, calculate a fitness value of the parameter entity group based on a step response characteristic of an output signal, and generate an offspring entity by applying weight-gain elitism to a parameter entity having the smallest fitness value among parameter entities included in the parameter entity group, and a controller configured to generate a control signal by multiplying an error signal by a parameter.

An embodiment discloses an apparatus for controlling a camera module, including a parameter generation unit configured to generate a parameter entity group, calculate a fitness value of the parameter entity group based on a step response characteristic of an output signal, and generate an offspring entity by applying weight-gain elitism to a parameter entity having the smallest fitness value among parameter entities included in the parameter entity group, and a controller configured to generate a control signal by multiplying an error signal by a parameter.

Disclosed are methods, systems, and articles of manufacture for implementing an electronic design using connect modules with dynamic and interactive control. An electronic design comprising a signal propagating across a boundary between a digital domain and an analog domain may be identified, and an analysis may be initiated for the electronic design. A connect module framework may provision for one or more dynamically placed objects in the electronic design. An internal characteristic of the one or more dynamically placed objects may be accessed with the connect module framework.

Disclosed are methods, systems, and articles of manufacture for implementing an electronic design using connect modules with dynamic and interactive control. An electronic design comprising a signal propagating across a boundary between a digital domain and an analog domain may be identified, and an analysis may be initiated for the electronic design. A connect module framework may provision for one or more dynamically placed objects in the electronic design. An internal characteristic of the one or more dynamically placed objects may be accessed with the connect module framework.

Aspects of the disclosed technology relate to techniques of activity coverage assessment. Transistor-level circuit simulation is performed for a circuit design under a set of test stimuli, which determines values of one or more electrical properties for each of circuit elements of interest in the circuit design. The one or more electrical properties are selected based on information of the each of circuit elements of interest, which comprises what circuit element type the each of circuit elements of interest belongs to. Based on the values of the one or more electrical properties, activity coverage information comprising information about which circuit elements in the circuit elements of interest are active or inactive under the set of test stimuli is determined.