Patent classifications
G06F2205/062
Signal transmission method and a circuit structure for heterogeneous platforms
A signal transmission method and a circuit structure for heterogeneous platforms are provided. The method includes: adjusting signal transmission bandwidths between a first platform and a bridge circuit and between the bridge circuit and a second platform according to signal transmission speeds between the first platform and the bridge circuit and between the bridge circuit and the second platform; transmitting a command signal from the first platform to the bridge circuit and saving the command signal at a buffer of the bridge circuit; reading the command signal at the buffer of the bridge circuit by the second platform; transmitting data to the buffer of the bridge according to the command signal by the second platform; acquiring the data at the buffer of the bridge by the first platform.
SIGNAL TRANSMISSION METHOD AND A CIRCUIT STRUCTURE FOR HETEROGENEOUS PLATFORMS
A signal transmission method and a circuit structure for heterogeneous platforms are provided. The method includes: adjusting signal transmission bandwidths between a first platform and a bridge circuit and between the bridge circuit and a second platform according to signal transmission speeds between the first platform and the bridge circuit and between the bridge circuit and the second platform; transmitting a command signal from the first platform to the bridge circuit and saving the command signal at a buffer of the bridge circuit; reading the command signal at the buffer of the bridge circuit by the second platform; transmitting data to the buffer of the bridge according to the command signal by the second platform; acquiring the data at the buffer of the bridge by the first platform.
Real-time hierarchical protocol decoding
Real-time USB class level decoding is disclosed. In some embodiments, a first packet associated with a USB class level operation associated with a target USB device that is being monitored is received. A second packet generated by a USB hardware analyzer configured to observe USB traffic associated with the target USB device is received. It is determined based at least in part on a time associated with one or both of the first packet and the second packet that the class level operation has timed out.
REAL-TIME HIERARCHICAL PROTOCOL DECODING
Real-time USB class level decoding is disclosed. In some embodiments, a first packet associated with a USB class level operation associated with a target USB device that is being monitored is received. A second packet generated by a USB hardware analyzer configured to observe USB traffic associated with the target USB device is received. It is determined based at least in part on a time associated with one or both of the first packet and the second packet that the class level operation has timed out.
Real-time hierarchical protocol decoding
Real-time USB class level decoding is disclosed. In some embodiments, a first packet associated with a USB class level operation associated with a target USB device that is being monitored is received. A second packet generated by a USB hardware analyzer configured to observe USB traffic associated with the target USB device is received. It is determined based at least in part on a time associated with one or both of the first packet and the second packet that the class level operation has timed out.
Systems and methods for low interference logging and diagnostics
Techniques described and suggested herein include systems and methods for logging execution of code using thread-local output buffers. For example, one or more output buffers are allocated to one or more threads executing on a computing system. A global declaration list containing information relating to log types (e.g., verbose log descriptions, templates for specific variables, and the like) may be implemented, and the global declaration list may be generated as part of an initialization process for some or all of the threads. Log events from executing threads may be stored in the output buffers in a fashion conforming to the global declaration list, and may be retrieved asynchronously relative to the executing threads.
SYSTEMS AND METHODS FOR LOW INTERFERENCE LOGGING AND DIAGNOSTICS
Techniques described and suggested herein include systems and methods for logging execution of code using thread-local output buffers. For example, one or more output buffers are allocated to one or more threads executing on a computing system. A global declaration list containing information relating to log types (e.g., verbose log descriptions, templates for specific variables, and the like) may be implemented, and the global declaration list may be generated as part of an initialization process for some or all of the threads. Log events from executing threads may be stored in the output buffers in a fashion conforming to the global declaration list, and may be retrieved asynchronously relative to the executing threads.
System-on-chip and application processor including FIFO buffer and mobile device comprising the same
A system-on-chip is provided which includes a data producer; a FIFO buffer which stores data transferred from the data producer at a memory area corresponding to a write pointer; a first consumer which pops data of a memory area corresponding to a first read pointer of the FIFO buffer out; and a second consumer which pops data of a memory area corresponding to a second read pointer of the FIFO buffer out. The FIFO buffer requests a pop-out operation at the second consumer according to the difference between the write pointer and the first read pointer or overwrites data provided from the data producer at a memory area corresponding to the second read pointer.