Methods and systems are presented for providing data consistency in a distributed data storage system using an eventual consistency model. The distributed data storage system may store data across multiple data servers. To process a request for writing a first data value for a data field, a first data server may generate, for the first data value, a first causality chain representing a data replacement history for the data field leading to the first data value. The first data server may insert the first data value without deleting pre-existing data values from the data field. To process a data read request, multiple data values corresponding to the data field may be retrieved. The first data server may then select one data value based on the causality chains associated with the multiple data values for responding to the data read request.

This invention improves the access performance of a storage medium and prolongs the life of the storage medium while preventing a situation in which a response to a write request is delayed to cause a write error. A storage control apparatus includes a rearrangement starter that starts data rearrangement processing in which fragmented data, which has been determined that data corresponding to a logical address area in a logical address space used by a host computer to access a storage medium are fragmented and stored in a plurality of physical address areas in a physical address space of the storage medium, is written in a continuous physical address area in the storage medium; and a rearrangement controller that evaluates, when receiving a write request from the host computer during the data rearrangement processing, whether the data rearrangement processing improves access performance to the storage medium, and instructs to continue the data rearrangement processing if the access performance is improved, but cancel or interrupt the data rearrangement processing if the access performance is not improved.

A memory system includes a memory device including a first memory block and a second memory block; and a controller suitable for controlling the memory device, wherein the controller includes a sequential index calculator suitable for calculating a sequential index based on first logical block address (LBA) information and second LBA information that are written in the first memory block; an internal operation determining component suitable for determining whether an internal operation is to be performed on the first memory block, by comparing the sequential index of the first memory block with a threshold value; and an internal operation performing component suitable for migrating pieces of LBA information stored in the first memory block to the second memory block to rearrange the pieces of LBA information, when it is determined that the internal operation is to be performed on the first memory block.

A method and a defragmentation module for defragmenting resources of a hardware system. The defragmentation module identifies a set of structures. Each structure of the set of structures partially hosts a respective set of host machines. Respective resources of each host machine of the respective set of host machines are allocated in at least two structures of the set of structures. The defragmentation module selects, from the respective resources of a host machine of the respective set of host machine, a remote resource of a first structure being different from a second structure partially hosting the host machine. A remote amount of the remote resource is less than an amount of available resources of the second structure. The defragmentation module assigns the remote amount of the available resources of the second structure to the host machine instead of the remote resource.

A mechanism is described for facilitating localized load-balancing for processors in computing devices. A method of embodiments, as described herein, includes facilitating hosting, at a processor of a computing device, a local load-balancing mechanism. The method may further include monitoring balancing of loads at the processor and serving as a local scheduler to maintain de-centralized load-balancing at the processor and between the processor and other one or more processors.

A method of determining causes of external fragmentation in a memory. The method includes collecting information associated with release of an area of the memory by an application, storing the information in the area of the memory, and analyzing the information to determine why the area of the memory has not been reallocated to any application. In embodiments wherein a first portion of an area of a memory is allocated to an application by an allocator and a second portion of the area of the memory is released by the allocator, the method includes storing in the second portion of the area of the memory an indicator indicating that the second portion is a remaining portion, collecting information associated with release of the second portion, storing the information in the second portion, and analyzing the information to determine why the second portion is not reallocated to any application.

Embodiments of the present disclosure relate to a method, device and computer program product for storing data. The method comprises obtaining a first range of replica levels supported by a storage apparatus, wherein the replica level indicates the number of replicas of data. The method further comprises receiving a replica configuration requirement for an application, wherein the application supports a second range of replica levels. Moreover, the method further comprises determining a first replica level for the storage apparatus and a second replica level for the application based on the replica configuration requirement, the first range and the second range. By extracting the replica function supported by the storage apparatus, embodiments of the present disclosure can configure replica levels of the storage apparatus and the application from the global level for the user requirement for replicas of the data service. Since the replica configuration from the global level can avoid unnecessary data replicas, embodiments of the present disclosure can realize better storage performance and resource utilization efficiency.

A storage system includes a host including a processor and a storage device including a controller and a flash memory unit. The host is configured to read physically fragmented data of a file stored in one or more physical storage regions of the flash memory unit and write the data continuously into other one or more physical regions of the flash memory unit, such that the data are physically defragmented.

The present disclosure relates to a system and method for managing files stored in a storage medium. The method may include obtaining file information of a file stored in the storage medium, wherein the file includes at least two data fragments, each two of the at least two data fragments are stored separately in two discontinuous storage units in the storage medium. The method may also include determining a first parameter of the file according to the file information, wherein the first parameter represents an integrity of the at least two data fragments in the storage medium. The method may further include determining whether the first parameter is equal to or smaller than a preset threshold. The method may still further include defragmenting the at least two data fragments in the storage medium if the first parameter is equal to or smaller than the preset threshold.

In response to a determination to allocate additional storage, within a real address space employed by a system memory of a data processing system, for translation control entries (TCEs) that translate addresses from an input/output (I/O) address space to the real address space, a determination is made whether or not a first real address range contiguous with an existing TCE data structure is available for allocation. In response to determining that the first real address range is available for allocation, the first real address range is allocated for storage of TCEs, and a number of levels in the TCE data structure is retained. In response to determining that the first real address range is not available for allocation, a second real address range discontiguous with the existing TCE data structure is allocated for storage of the TCEs, and a number of levels in the TCE data structure is increased.