Methods and apparatus for reliable distributed messaging are described. A computer system includes a system memory coupled to one or more processors. The system memory comprises at least a non-volatile portion. A particular location within the non-volatile portion is designated as a target location to which a sender module participating in a communication protocol is granted write permission. A receiver module participating in the communication protocol, subsequent to a failure event that results in a loss of data stored in a volatile portion of the system memory, reads a data item written by the sender program at the target location prior to the failure event. The receiver module performs an operation based on contents of the data item.

A computing device includes a CPU, a CPU memory for CPU, a non-volatile memory, a coprocessor using the non-volatile memory, a coprocessor memory for storing data to be processed by the coprocessor or data processed by the coprocessor, and a recording medium. The recording medium includes a controller driver for the non-volatile memory and a library that are executed by the CPU. The controller driver maps the coprocessor memory to a system memory block of the CPU memory. The library moves data between the coprocessor and the non-volatile memory via the system memory block mapped to the coprocessor memory.

Hybrid multi-level memory architecture technologies are described. A System on Chip (SOC) includes multiple functional units and a multi-level memory controller (MLMC) coupled to the functional units. The MLMC is coupled to a hybrid multi-level memory architecture including a first-level dynamic random access memory (DRAM) (near memory) that is located on-package of the SOC and a second-level DRAM (far memory) that is located off-package of the SOC. The MLMC presents the first-level DRAM and the second-level DRAM as a contiguous addressable memory space and provides the first-level DRAM to software as additional memory capacity to a memory capacity of the second-level DRAM. The first-level DRAM does not store a copy of contents of the second-level DRAM.

A method of providing a file system for an electronic device includes organizing a plurality of Non-Volatile Dual In-Line Memory Module-Ps (NVDIMM-Ps) of a memory device of the electronic device into a plurality of groups based on location information of the NVDIMM-Ps, and creating a single File System Instance (FSI) for each group included in the plurality of groups.

A memory management method applicable to a data storage device is provided. The memory management method includes steps of: requesting a private memory space from a host; recording a reserved memory space given by the host; dividing a mapping table into a plurality of sub-mapping tables; determining whether a capacity of the reserved memory space is sufficient to store the sub-mapping tables; and if yes, uploading the sub-mapping tables to the reserved memory space via an interface logic.

Disclosed is a memory package. The memory package includes a nonvolatile memory chip, a volatile memory chip of which an access speed is faster than an access speed of the nonvolatile memory chip, and a logic chip for performing a refresh operation about the volatile memory chip in response to a refresh command from an external device, and migrating at least a portion of data stored in the nonvolatile memory chip to the volatile memory chip when the refresh operation is performed.

In one embodiment, a system has a master programmable device (PD) with native dual-boot capability and one or more slave PDs with no native dual-boot capability. A master golden image includes an embedded dual-boot function. During power-up, each PD copies its primary image into its volatile configuration memory and determines whether the primary image is valid. When the master's configuration engine detects an invalid master primary image, then the master's native dual-boot capability enables the master to implement a system-reboot procedure, which includes copying the master golden image from an external memory device into the master's volatile configuration memory and launching the embedded dual-boot function, which in turn copies the slave golden images from the external memory device into the slaves' volatile configuration memories before enabling other master-golden-image functions. Significant system reliability and robustness are achieved without provisioning every PD with native dual-boot capability.

An operating method for a data storage device includes providing a nonvolatile memory device including a plurality of pages; segmenting an address map which maps a logical address provided from a host device and a physical address of the nonvolatile memory device, by a plurality of address map segments according to a segment size that is set depending on a quality of service time allowed to process a request of the host device and an unprocessed workload; and flushing at least one of the address map segments in the nonvolatile memory device after processing the unprocessed workload.

Techniques and systems are provided for tracking commands. Such methods and systems can include receiving a data access request in a controller coupled to (a) a non-volatile memory configured to store a set of physical data pages, and (b) a volatile memory configured to store a plurality of physical data page addresses, wherein each physical data page address corresponding to a physical data page in the set of physical data pages, and each physical data page address is accessed via a corresponding logical address in a set of logical addresses; accessing, by the controller based on the received data access request, a bitmap stored on the volatile memory, the bitmap including a set of bits, each bit configured to indicate a validity state of a different plurality of logical addresses in a set of logical addresses; and determining, via the controller, an invalid state of at least one of a selected (a) logical address, or (b) plurality of logical addresses, based on a bit in the bitmap.

A memory device may include: a data determination unit for receiving page data from a main memory device, and distinguishing between first and second data based on tag information of the page data; an index management unit for storing an index of the first data; a first cache for storing the second data, and writing back first victim data to the main memory device, the first victim data being selected when the first cache is full; and a second cache for storing the first victim data transferred from the first cache when a write count of the first victim data is smaller than a first threshold value, updating tag information of second victim data to a value indicating the first data, the second victim data being selected when the second cache is full, and storing the second victim data in the main memory device.