G06F2212/214

METHOD AND SYSTEM FOR CONSTRUCTING PERSISTENT MEMORY INDEX IN NON-UNIFORM MEMORY ACCESS ARCHITECTURE
20220413952 · 2022-12-29 ·

A method for constructing a persistent memory index in a non-uniform memory access architecture includes: maintaining partial persistent views in a persistent memory and maintaining a global volatile view in a DRAM; an underlying persistent memory index processing a request in a foreground thread when cold data is accessed; when hot data is accessed, reading a key-value pair for a piece of hot data in the global volatile view in response to a query operation carried in the request, and in response to an insert/update/delete operation carried in the request, updating a local partial persistent view and the global volatile view; and in response to a hotspot migration, a background thread generating new partial persistent views and a new global volatile view, and recycling the partial persistent views and the global volatile view for old hot data into the underlying persistent memory index.

MIRRORING DATA IN WRITE CACHES OF A CONTROLLER OF A NON-VOLATILE MEMORY

A data storage system provides persistent storage in bulk non-volatile memory. A controller of the data storage system receives a host write command and buffers associated host write data in both a first write cache in non-volatile memory and a mirrored second write cache in volatile memory. The controller destages the host write data to the bulk non-volatile memory from the second write cache but not the first write cache. The controller services relocation write commands requesting data relocation within the bulk non-volatile memory by reference to the second write cache. Servicing the relocation write commands includes buffering relocation write data in the second write cache but not the first write cache and destaging the relocation write data to the bulk non-volatile memory from the second write cache.

STORAGE OF DATA STRUCTURES
20220405288 · 2022-12-22 ·

A method, a system, and a computer program product for placement or storage of data structures in memory/storage locations. A type of a data structure for storing data and a type of data access to the data structure are determined. The type of data access includes a first and a second type of data access. A frequency of each type of access to each type of data structure accessed by a query is determined. Using the determined frequency, a number of first type of data accesses to the data structure is compared to a number of second type of accesses to the data structure. The numbers of first and second types of data access are compared to a predetermined threshold percentage of a total number of data accesses to the data structure. Based on the comparisons, a physical memory location for storing data is determined.

FROZEN TIME CACHE FOR MULTI-HOST READ OPERATIONS
20220405206 · 2022-12-22 ·

Aspects of a storage device including a memory and a controller are provided. The controller may receive a prefetch request to retrieve data for a host having a promoted stream. The controller may access a frozen time table indicating hosts for which data has been prefetched and frozen times associated with the host and other hosts. The controller can determine whether the host has a higher priority over other hosts included in the frozen time table based on corresponding frozen times and data access parameters associated with the host. The controller may determine to prefetch the data for the host in response to the prefetch request when the host has a higher priority than the other hosts. The controller can receive a host read command associated with the promoted stream from the host and provide the prefetched data to the host in response to the host read command.

Data transfer in port switch memory
11531490 · 2022-12-20 · ·

The present disclosure includes apparatuses and methods related to data transfer in memory. An example apparatus can include a first number of memory devices coupled to a host via a first number of ports and a second number of memory devices coupled to the first number of memory device via a second number of ports, wherein a first number of commands are executed to transfer data between the first number of memory devices and the host via the first number of ports and a second number of commands are executed to transfer data between the first number of memory device and the second number of memory device via the second number of ports.

STORAGE DEVICE AND OPERATING METHOD THEREOF
20220391323 · 2022-12-08 ·

A storage device is provided to comprise a memory device for storing data, a cache memory device including a first cache memory configured to cache certain data stored in the memory device and a second cache memory configured to store data evicted from the first cache memory, and a memory controller configured to receive a read request for first data from a host, evict second data from the first cache memory based on a reuse distance of the second data, store the second data in the second cache memory, load the first data to the first cache memory, and transmit the first data to the host.

Storage device and method of operating the same
11520519 · 2022-12-06 · ·

Provided herein may be a storage device and a method of operating the same. A memory controller may include a command processor configured to generate a flush command in response to a flush request and determine flush data chunks to be stored, a write operation controller configured to control memory devices to perform a first program operation of storing flush data chunks, and to perform a second program operation of storing data corresponding to a write request that is input later than the flush request, regardless of whether a response to the flush command has been provided to a host, and a flush response controller configured to, when the first program operation is completed, provide a response to the flush command to the host depending on whether responses to flush commands, input earlier than the flush command, have been provided to the host.

Method To Use Flat Relink Table In HMB
20220382452 · 2022-12-01 ·

A data storage device includes a non-volatile memory (NVM) device and a controller coupled to the NVM device. The controller is configured to create a bad block table that tracks bad blocks of the NVM device, send the bad block table to a host memory location, and check the bad block table to determine whether a block to be read or written to is bad. The controller is further configured to request information on a bad block from the bad block table located in the host memory location, determine that the requested information is not available from the host memory location, and retrieve the requested information from a location separate from the host memory location. A sum of the times to generate a request to check the flat relink table, execute the request, and retrieve the requested information is less than a time to process a host command.

TECHNIQUES FOR PAGE LINE FILLER DATA
20220374163 · 2022-11-24 ·

Methods, systems, and devices for using page line filler data are described. In some examples, a memory system may store data within a write buffer of the memory system. The memory system may initiate an operation to transfer the write buffer data to a memory device, for example, due to a command to perform a memory management operation (e.g., cache synchronization, context switching, or the like) from a host system. In some examples, a quantity of write buffer data may fail to satisfy a data size threshold. Thus, the memory system may aggregate the data in the write buffer with valid data from a block of the memory device associated with garbage collection. The memory system may aggregate the write buffer data with the garbage collection data until the aggregated data satisfies the data size threshold. The memory system may then write the aggregated data to the memory device.

Directed sanitization of memory

The present disclosure includes apparatuses and methods for directed sanitization of memory. One example method comprises, responsive to receiving a sanitization command, performing a deterministic garbage collection operation on a memory, wherein performing the deterministic garbage collection operation results in physical erasure of all invalid data stored on the memory without losing valid data stored on the memory.