G06F2212/311

Method for accessing data in an external memory of a microcontroller
11734200 · 2023-08-22 · ·

A method for accessing data in an external memory of a microcontroller, the microcontroller having an internal memory. The method includes: providing a classification data record in the internal memory, the classification data record for data stored in segments in the external memory including a segment-data classification for each segment, the segment-data classification characterizing the data stored in the respective segment; and a read access in which data corresponding to a predetermined data classification are read from the external memory. The read access includes checking a segment, the segment-data classification of the segment being read from the internal memory during the checking and being compared to the predetermined data classification, and: if the segment-data classification read corresponds to the predetermined data classification, reading the data stored in the segment from the external memory, or, if the segment-data classification does not correspond, resuming with the checking step for a further segment.

Method and system for performing data movement operations with read snapshot and in place write update

Method and system for performing data movement operations is described herein. One embodiment of a method includes: storing data for a first memory address in a cache line of a memory of a first processing unit, the cache line associated with a coherency state indicating that the memory has sole ownership of the cache line; decoding an instruction for execution by a second processing unit, the instruction comprising a source data operand specifying the first memory address and a destination operand specifying a memory location in the second processing unit; and responsive to executing the decoded instruction, copying data from the cache line of the memory of the first processing unit as identified by the first memory address, to the memory location of the second processing unit, wherein responsive to the copy, the cache line is to remain in the memory and the coherency state is to remain unchanged.

STORAGE SERVER, A METHOD OF OPERATING THE SAME STORAGE SERVER AND A DATA CENTER INCLUDING THE SAME STORAGE SERVER

A storage server and a method of driving the storage server are provided. The storage server includes a processor configured to: generate a plurality of flush write commands based on a write command of first data provided from a host, provide a replication command corresponding to the write command to an external storage server, and receive an operation completion signal of the replication command from the external storage server; a memory storing a program of a log file to which the plurality of flush write commands are logged; and a storage device configured to receive a multi-offset write command including one or more flush write commands logged to the log file, and perform a flush operation on the multi-offset write command. The processor is further configured to provide the multi-offset write command to the storage device based on the log file after receiving the operation completion signal.

CACHE MANAGEMENT IN A PRINTING SYSTEM IN A VIRTUALIZED COMPUTING ENVIRONMENT
20220137905 · 2022-05-05 · ·

A varied least recently used (VLRU) caching technique is used to enable print data to be available at a cache of a client for printing, even after an agent performs a deletion of a hash value for the print data at a cache of the agent. The deletion of the print data (cached at the cache of the client) is postponed at the client device via the use of a waiting list, so that the cached print data can be printed at a physical printer of the client, in response to receiving a delayed print job from the agent that specifies the hash value as a result of a deduplication process performed by the agent.

Managing host input/output in a memory system executing a table flush

Responsive to receiving a table flush command, a first portion of an address mapping table is identified. A first flush operation with respect to a first portion of the address mapping table is performed. Responsive to receiving at least one memory access command, flush operations for a subsequent portion of the address mapping table is suspended. At least one memory access operation specified by the at least one memory access command is performed. A second flush operation with respect to the subsequent portion of the address mapping table is performed.

COPY-ON-WRITE FOR VIRTUAL MACHINES WITH ENCRYPTED STORAGE
20230297411 · 2023-09-21 ·

Technology for enabling a hypervisor to perform copy on write features on encrypted storage of a virtual machine. An example method may involve: receiving, by a source virtual machine managed by a hypervisor, a measurement associated with a state of a firmware of the hypervisor, a first identifier of a first storage block of the source virtual machine, and a second identifier of a second storage block of a destination virtual machine; validating the measurement associated with the state of the firmware of the hypervisor; and transmitting, to a worker virtual machine, a first cryptographic key for use in copying data of the first storage block to the second storage block.

DISTRIBUTED VFS WITH SHARED PAGE CACHE
20220027327 · 2022-01-27 · ·

An apparatus includes a memory including a shared page cache and program instructions for a distributed virtual file system (VFS) for use in performing input/output (I/O) operations. An operating system of the computing system executes a central VFS in a first thread and executes a first application and the program instructions for the distributed VFS in a second thread. The distributed VFS determines that a first page, including data to which a first application has requested access, is stored in the shared page cache. In response to the determination, the distributed VFS accesses the requested data from the shared page cache without signaling the operating system or the central VFS. The computing system may be implemented in a device including a microkernel operating system.

FAST CACHE WITH INTELLIGENT COPYBACK
20220027234 · 2022-01-27 ·

Method and apparatus for intelligent caching, protection and transfers of data between a cache and a main memory in a data storage environment, such as but not limited to a solid-state drive (SSD). A main memory (MM) has non-volatile memory (NVM) cells configured for persistent storage of user data. A fast response cache (FRC) has NVM cells configured to provide storage of first data prior to transfer to the MM. A write cache (WC) has NVM cells configured to provide storage of second data prior to transfer to the MM. A controller directs input data to either the FRC or the WC. A first type of error correction encoding (ECC1) is applied to the first data and a different, second type of error correction encoding (ECC2) is applied to the second data. Data may be sent from the FRC to the MM either directly or through the WC.

In-Memory Distributed Cache
20220019540 · 2022-01-20 · ·

A method for an in-memory distributed cache includes receiving a write request from a client device to write a block of client data in random access memory (RAM) of a memory host and determining whether to allow the write request by determining whether the client device has permission to write the block of client data at the memory host, determining whether the block of client data is currently saved at the memory host, and determining whether a free block of RAM is available. When the client device has permission to write the block of client data at the memory host, the block of client data is not currently saved at the memory host, and a free block of RAM is available, the write request is allowed and the client is allowed to write the block of client data to the free block of RAM.

MEMORY SYSTEM, MEMORY CONTROLLER, AND OPERATION METHOD THEREOF
20210365382 · 2021-11-25 ·

The memory system is provided to include a memory device, and a memory controller configured to control the memory device. The memory controller is configured to transmit, after the host completes a first initial setting operation for the memory system, mapping information between a logical address and a physical address to a host in order to load the mapping information between the logical address and the physical address into a host memory area located in the host, and to transmit, before the host executes a second initial setting operation for the memory system, to the host, updated mapping information between the logical address and the physical address to update, based on a change made to the host memory area.