Systems and methods are described for transforming a data set within a data source into a series of task calls to an on-demand code execution environment. The environment can utilize pre-initialized virtual machine instances to enable execution of user-specified code in a rapid manner, without delays typically caused by initialization of the virtual machine instances, and are often used to process data in near-real time, as it is created. However, limitations in computing resources may inhibit a user from utilizing an on-demand code execution environment to simultaneously process a large, existing data set. The present application provides a task generation system that can iteratively retrieve data items from an existing data set and generate corresponding task calls to the on-demand computing environment. The calls can be ordered to address dependencies of the data items, such as when a first data item depends on prior processing of a second data item.

Data processing apparatuses, methods of data processing, instructions, and simulator computer programs for providing a corresponding instruction execution environment are disclosed. Decode circuitry is responsive to an instance of a predetermined instruction type to cause issue circuitry to issue at least one subsequent instruction for execution to one of first and second instruction execution circuitry which support decoupled access-execute instruction execution. The predetermined instruction type is thus a steering instruction for at least one subsequent instruction and the programmer is provided with a mechanism for determining which program instructions are treated as access instructions and which are treated as execute instructions.

The disclosure provides an approach for launching a virtualized application, including (i) responsive to a first event occurring prior to any event for launching the virtualized application after user logon, executing a driver to fetch a subset of the files of the virtualized application from the network storage into system memory of the computer system; and (ii) responsive to a second event corresponding to a launch of the virtualized application, instantiating an execution space for the virtualized application and loading at least one of the fetched files into the system memory for execution. The driver maintains a map between (1) a file ID of the at least one of the fetched files and (2) a value of a pointer that points to a data structure referenced when caching the at least one of the fetched files.

A data processing apparatus is provided. The data processing apparatus includes fetch circuitry to fetch instructions from storage circuitry. Decode circuitry decodes each of the instructions into one or more operations and provides the one or more operations to one or more execution units. The decode circuitry is adapted to decode at least one of the instructions into a plurality of operations. Cache circuitry caches the one or more operations and at least one entry of the cache circuitry is a compressed entry that represents the plurality of operations.

Systems and methods are described for transforming a data set within a data source into a series of task calls to an on-demand code execution environment or other distributed code execution environment. Such environments utilize pre-initialized virtual machine instances to enable execution of user-specified code in a rapid manner, without delays typically caused by initialization of the virtual machine instances, and are often used to process data in near-real time, as it is created. However, limitations in computing resources may inhibit a user from utilizing an on-demand code execution environment to simultaneously process a large, existing data set. The present application provides a task generation system that can iteratively retrieve data items from an existing data set and generate corresponding task calls to the on-demand computing environment, while ensuring that at least one task call for each data item within the existing data set is made.

An apparatus (2) has processing circuitry to process micro-operations, the processing circuitry supporting speculative processing of read micro-operations for reading data from a memory system. A cache (6, 8) is provided to cache the micro-operations or instructions decoded to generate the micro-operations. Profiling circuitry (40) annotates at least one cached micro-operation or instruction with annotation information depending on analysis of whether a read micro-operation satisfies a speculative side-channel condition indicative of a risk of information leakage if the read micro-operation is processed speculatively. The processing circuitry (12, 14) determines whether to trigger a speculative side-channel mitigation measure depending on the annotation information stored in the cache (6, 8).

A system includes a processor and memory including one or more memory region groups, each including a plurality of distinct memory regions. In embodiments, each memory region of a particular memory region group has a same set of memory attributes and is associated with a same attribute group identifier (AGI). In response to an access request to a memory location of a memory region within the particular memory region group, the AGI may be used to identify the set of memory attributes to be applied when executing the access request. In response to a request to change one or more memory attributes of the particular memory region group, update of a single entry changes the memory attributes for all memory regions of the particular memory region group, without accessing individual metadata of each memory region. The update can be accomplished atomically and substantially simultaneously.

A system includes a processor and memory including one or more memory region groups, each including a plurality of distinct memory regions. In embodiments, each memory region of a particular memory region group has a same set of memory attributes and is associated with a same attribute group identifier (AGI). In response to an access request to a memory location of a memory region within the particular memory region group, the AGI may be used to identify the set of memory attributes to be applied when executing the access request. In response to a request to change one or more memory attributes of the particular memory region group, update of a single entry changes the memory attributes for all memory regions of the particular memory region group, without accessing individual metadata of each memory region. The update can be accomplished atomically and substantially simultaneously.

Recording a trace of code execution using reserved cache lines in a cache. A computing device comprises processing units and a cache. The cache includes a first plurality of cache lines that each comprise an address portion for storing a memory address within the memory device, and a value portion for storing a value associated with the memory address. The cache also includes a second plurality of reserved cache lines that store a plurality of sets of accounting bits. Each set of accounting bits comprises a plurality of accounting bits and is associated with a different cache line in the first cache lines. Each cache line in the second cache lines stores multiple of the sets of accounting bits. Stored control logic uses the plurality of sets of accounting bits in the second cache lines to track trace logging information for the first cache lines.

A processor includes a processor core and a micro-op cache communicably coupled to the processor core. The micro-op cache includes a micro-op tag array, wherein tag array entries in the micro-op tag array are indexed according to set and way of set-associative cache, and a micro-op data array to store multiple micro-ops. The data array entries in the micro-op data array are indexed according to bank number of a plurality of cache banks and to a set within one cache bank of the plurality of cache banks.