Patent classifications
G06F2212/453
Memory controller for allocating cache lines and method of operating the same
The present technology relates to an electronic device. A memory controller that increases a hit ratio of a cache memory includes a memory buffer configured to store command data corresponding to a request received from a host, and a cache memory configured to cache the command data. The cache memory stores the command data by allocating cache lines based on a component that outputs the command data and a flag included in the command data.
REDUCING SUBSEQUENT NETWORK LAUNCH TIME OF CONTAINER APPLICATION
The disclosure provides an approach for launching a virtualized application, including (i) responsive to a first event occurring prior to any event for launching the virtualized application after user logon, executing a driver to fetch a subset of the files of the virtualized application from the network storage into system memory of the computer system; and (ii) responsive to a second event corresponding to a launch of the virtualized application, instantiating an execution space for the virtualized application and loading at least one of the fetched files into the system memory for execution. The driver maintains a map between (1) a file ID of the at least one of the fetched files and (2) a value of a pointer that points to a data structure referenced when caching the at least one of the fetched files.
Recording a trace of code execution using reference bits in a processor cache
Recording a trace of code execution using reference bits in a processor cache. A computing device comprises processing units and a shared cache. The shared cache includes a plurality of cache lines that is each associated with a plurality of accounting bits, which each includes a reference bits portion. Stored control logic uses these reference bits to log a second read operation by a second processing unit in reference to an already logged first read operation by a first processing unit.
FACILITATING RECORDING A TRACE FILE OF CODE EXECUTION USING INDEX BITS IN A PROCESSOR CACHE
Facilitating recording a trace of code execution using a processor cache. A method includes identifying an operation by a processing unit on a line of the cache. Based on identifying the operation, accounting bits for the cache line are set. Setting the accounting bits includes (i) setting the accounting bits to a reserved value when the operation is a write and tracing is disabled, (ii) setting the accounting bits to an index of the processing unit when the operation is a write and the accounting bits for the cache line are set to a value other than the index of the processing unit, or (iii) setting the accounting bits to the index of the processing unit when the operation is a read that is consumed by the processing unit and the accounting bits for the cache line are set to a value other than the index of the processing unit.
DEFRAGMENTED AND EFFICIENT MICRO-OPERATION CACHE
A processor includes a processor core and a micro-op cache communicably coupled to the processor core. The micro-op cache includes a micro-op tag array, wherein tag array entries in the micro-op tag array are indexed according to set and way of set-associative cache, and a micro-op data array to store multiple micro-ops. The data array entries in the micro-op data array are indexed according to bank number of a plurality of cache banks and to a set within one cache bank of the plurality of cache banks.
REUSE OF A RELATED THREAD'S CACHE WHILE RECORDING A TRACE FILE OF CODE EXECUTION
A method executed in a computing device with multiple processing units and a shared processor cache for caching data from memory involves identifying a read operation from a cache line in the processor cache while executing a thread on a processing unit. The method further includes identifying the memory page in the memory device corresponding to the read, determining the cleanliness of the memory page based on a bit in a memory page table, and selectively logging the cache line to a thread trace based on the cleanliness status of the memory page. If the memory page is dirty, the cache line is logged to the trace; if clean, the logging is omitted.
ACCELERATING SOFTWARE BUILDS
A set of source files is stored in a shared storage repository for nodes of a distributed computing environment for software compilation. An object file is created based on at least a portion of the set of source files. A directed acyclic graph (DAG) is generated corresponding to a group of software build tasks and the relationship between the software build tasks based on the set of source files. A replication factor for the object file is determined based on the number of relationships of the object file identified from the DAG. The object file is stored in a local memory cache of at least one of the number of the nodes, wherein the number of the nodes is based on the replication factor for the object file.
ACCELERATING SOFTWARE BUILDS
A set of source files is stored in a shared storage repository for nodes of a distributed computing environment for software compilation. An object file is created based on at least a portion of the set of source files. A directed acyclic graph (DAG) is generated corresponding to a group of software build tasks and the relationship between the software build tasks based on the set of source files. A replication factor for the object file is determined based on the number of relationships of the object file identified from the DAG. The object file is stored in a local memory cache of at least one of the number of the nodes, wherein the number of the nodes is based on the replication factor for the object file.
STORAGE CONTROL DEVICE, METHOD OF STORING DATA, AND STORAGE SYSTEM
A control device includes a first and a second control devices, the first control device is configured to transmit second data to the second control device at a first time, receive a first notification from the second control device at a second time, transmit the second data to a storage device at a third time, receive a second notification from the storage device at a fourth time, select a first or a second mode based on a comparison of the first period from the first time to the second time and the second period from the third time to the fourth time, in the first mode, transmit the first data to the second control device and the storage device, receive the first notification, transmit a processing completion notification, in the second mode, transmit the first data to the storage device, receive the second notification, transmit the processing completion notification.
Accelerating software builds
A set of source files is stored in a shared storage repository for nodes of a distributed computing environment for software compilation. An object file is created based on at least a portion of the set of source files. A directed acyclic graph (DAG) is generated corresponding to a group of software build tasks and the relationship between the software build tasks based on the set of source files. A replication factor for the object file is determined based on the number of relationships of the object file identified from the DAG. The object file is stored in a local memory cache of at least one of the number of the nodes, wherein the number of the nodes is based on the replication factor for the object file.