Systems, apparatuses, and methods related to bit string conversion are described. A memory resource and/or logic circuitry may be used in performance of bit string conversion operations. The logic circuitry can perform operations on bit strings, such as universal number and/or posit bit strings, to alter a level of precision (e.g., a dynamic range, resolution, etc.) of the bit strings. For instance, the memory resource can receive data comprising a bit string having a first quantity of bits that correspond to a first level of precision. The logic circuitry can determine that the bit string having the first quantity of bits has a particular data pattern and alter the first quantity of bits to a second quantity of bits that correspond to a second level of precision based, at least in part, on the determination that the bit string has the particular data pattern.

According to one embodiment, a memory device includes a nonvolatile semiconductor memory having physical storage areas that includes a user area externally accessible and are divided into management units and a control unit. The control unit receives a control command having a first argument to designate a sequential write area and a read command or a write command, assigns a management unit represented by an address of the read command or the write command as the sequential write area, and changes memory access control by judging whether an address of a memory access command to access the user area indicates access in the sequential write area whose size is equivalent to the management unit.

A semiconductor storage device includes memory cells, select transistors, memory strings, first and second blocks, word lines, and select gate lines. In the memory string, the current paths of plural memory cells are connected in series. When data are written in a first block, after a select gate line connected to the gate of a select transistor of one of the memory strings in the first block is selected, the data are sequentially written in the memory cells in the memory string connected to the selected select gate line. When data are written in the second block, after a word line connected to the control gates of memory cells of different memory strings in the second block is selected, the data are sequentially written in the memory cells of the different memory strings in the second block which have their control gates connected to the selected word line.

Provided are a storage device, a storage controller, and an operating method of the storage controller. The storage device according to the inventive concept includes a non-volatile memory and a storage controller. The non-volatile memory includes a plurality of memory blocks, each memory block includes physical units having different retention strengths due to process variations, and the retention strengths respectively correspond to times that physical units retain data before respective reclaim operations for the physical units. The storage controller receives a write request and data from a host, selects a first physical unit based on hotness of data and retention strengths, and controls the non-volatile memory to write data to the first physical unit.

A non-volatile storage device according to an embodiment of the present technology includes a storage section and a calculation section. The storage section includes a plurality of block sections each including a plurality of page sections into which data can be written independent of each other, the plurality of block sections being capable of collectively deleting the data written in the plurality of page sections. The calculation section calculates, on the basis of information about write conditions of the plurality of page sections included in the storage section, candidate addresses that are candidates of logical addresses of the data to be written into the plurality of page sections.

A method includes identifying, by a processing device, a common pool of blocks comprising a first plurality of blocks allocated to system data and a second plurality of blocks allocated to user data; determining whether user data has been written to the second plurality of blocks within a threshold period of time; and responsive to determining that the user data has not been written to the second plurality of blocks within the threshold period of time, allocating a block from the second plurality of blocks to the first plurality of blocks.

A memory system includes a first memory cell array which is a nonvolatile memory cell array, a controller configured to control read and write of data, a first data latch group used for input and output of the data between the controller and the first memory cell array, and at least one second data latch group in which stored data is maintained when the data is read from the first memory cell array by the controller. The controller is configured to store management information in the at least one second data latch group when or before executing a read process for the data from the first memory cell array, the management information being in a second memory cell array and used for read of the data.

In an implementation, a data storage method comprises obtaining a write request by a processing apparatus, where the write request includes first data to be written. Determining based on at least one of an access feature and a service requirement of the first data, a first category of the first data at a current moment; and indicating the storage apparatus to store the first data in a first type of storage unit. The first category indicates a programming rate requirement of the first data, and the first type is determined based on the first category.

A storage controller and a storage system comprising the same are provided. Provided is a device security manager configured to set a first device security zone to allow a first tenant to access first tenant data stored in a non-volatile memory, receive access information from a host device and writing the received access information in a mapping table, wherein the access information includes a first host memory address in which the first tenant data is stored in the host device, a first namespace identifier for identifying the first tenant data stored in the non-volatile memory, a first logic block address corresponding to the first namespace identifier, and an encryption key, encrypt the first tenant data by using the encryption key, and write the encrypted first tenant data in the first device security zone of the non-volatile memory.

A memory system includes a non-volatile memory and a memory controller. The non-volatile memory includes a memory cell array having pages. The memory system is configured to execute a first operation method and a second operation method. The memory system includes a control information storage unit in which a first value is set for pages having a write operation speed that is slower than a first speed, and a second value is set for pages having a write operation speed that is equal to or higher than the first speed. The memory system is configured to, at the time of write operation, select the first operation method for a target page having the first value and perform the write operation using the first operation method, and select the second operation method for a target page having the second value and perform the write operation using the second operation method.