G06F2212/7207

DIAGONAL PAGE MAPPING IN MEMORY SYSTEMS

A first host data item and a second host data item are received. The first host data item is stored in a first page of a first logical unit of a memory device, where the first page is one of a plurality of pages associated with redundancy metadata. A second page a second page of a second logical unit of the memory device is identified, where the second page is one of the plurality of pages associated with the redundancy metadata, and the first page and the second page are associated with different wordlines of the memory device. The second host data item is stored in the second page of the second logical unit of the memory device. The first page and the second page can be associated with a fault tolerant stripe that includes the redundancy metadata.

Managing data dependencies in a transfer pipeline of a hybrid dimm

Systems and methods are disclosed including a first memory component, a second memory component having a lower access latency than the first memory component and acting as a cache for the first memory component, and a processing device operatively coupled to the first and second memory components. The processing device can perform operations including receiving a data access operation and, responsive to determining that a data structure includes an indication of an outstanding data transfer of data associated with a physical address of the data access operation, determining whether an operation to copy the data, associated with the physical address, from the first memory component to the second memory component is scheduled to be executed. The processing device can further perform operations including determining to delay a scheduling of an execution of the data access operation until the operation to copy the data is executed.

TECHNOLOGIES FOR SWITCHING NETWORK TRAFFIC IN A DATA CENTER

Technologies for switching network traffic include a network switch. The network switch includes one or more processors and communication circuitry coupled to the one or more processors. The communication circuity is capable of switching network traffic of multiple link layer protocols. Additionally, the network switch includes one or more memory devices storing instructions that, when executed, cause the network switch to receive, with the communication circuitry through an optical connection, network traffic to be forwarded, and determine a link layer protocol of the received network traffic. The instructions additionally cause the network switch to forward the network traffic as a function of the determined link layer protocol. Other embodiments are also described and claimed.

DATA STORAGE DEVICE AND METHOD FOR REWRITING PARAMETERS THEREOF
20230101705 · 2023-03-30 ·

A data storage device is provided. The data storage device includes a flash memory and a controller. The flash memory stores a firmware that includes a plurality of mode page settings, and each mode page setting includes a plurality of mode parameters. The controller receives a data out message arranged to rewrite a first mode page setting among the plurality of mode page settings. When determining, based on a reference array, that the data out message will change the mode parameters which cannot be rewritten in the first mode page setting, the controller rejects to change the mode parameters which cannot be rewritten in the first mode page setting. The reference array stores a rewriteable setting for each bit of the first mode page setting.

Memory system storing management information and method of controlling same

A memory system includes a management-information restoring unit. The management-information restoring unit determines whether a short break has occurred referring to a pre-log or a post-log in a NAND memory. The management-information restoring unit determines that a short break has occurred when the pre-log or the post-log is present in the NAND memory. In that case, the management-information restoring unit determines timing of occurrence of the short break, and, after selecting a pre-log or a post-log used for restoration, performs restoration of the management information reflecting these logs on a snapshot. Thereafter, the management-information restoring unit applies recovery processing to all write-once blocks in the NAND memory, takes the snapshot again, and opens the snapshot and the logs in the past.

NAND DATA PLACEMENT SCHEMA

Disclosed in some examples are improvements to data placement architectures in NAND that provide additional data protection through an improved NAND data placement schema that allows for recovery from certain failure scenarios.

The present disclosure stripes data diagonally across page lines and planes to enhance the data protection. Parity bits are stored in SLC blocks for extra protection until the block is finished writing and then the parity bits may be deleted.

Data storage device and data storage system

A data storage device including a first non-volatile memory configured to store data, and a device controller configured to control the first non-volatile memory may be provided, and wherein the device controller may be configured to receive a data read command including a first logical address of the first non-volatile memory, a first physical address corresponding to the first logical address, and first status information of the first non-volatile memory corresponding to the first physical address, determine a first read level, using the first status information included in the data read command, and apply a voltage of the first read level to a first word line of the first non-volatile memory corresponding to the first physical address to read data.

DYNAMICALLY SIZED REDUNDANT WRITE BUFFER WITH SECTOR-BASED TRACKING
20230102184 · 2023-03-30 ·

Exemplary methods, apparatuses, and systems include detecting an operation to write dirty data to a cache. The cache is divided into a plurality of channels. In response to the operation, the dirty data is written to a first cache line in the cache, the first cache line being accessed via a first channel. Additionally, a redundant copy of the dirty data is written to a second cache line in the cache. The second cache line serves as a redundant write buffer and is accessed via a second channel, the first and second channels differing from one another. A metadata entry for the second cache line is updated to reference a location of the dirty data in the first cache line.

Storage system and method for validation of hints prior to garbage collection

A storage system and method for validation of hints prior to garbage collection are provided. In one embodiment, a method is provided comprising receiving a command from a host to store data in a memory; storing, in the memory, the data and a hint that characterizes the data; determining whether the hint is still valid; and in response determining that the hint is still valid, using the hint in performing garbage collection. Other embodiments are provided.

Recovery From HMB Loss
20230100149 · 2023-03-30 ·

A data storage device includes a memory device and a controller coupled to the memory device. The controller is configured to determine that a connection to a host memory buffer (HMB) of a host device is lost, load a most recent copy of a flash translation layer (FTL) table from the memory device, generate one or more updates to the most recent copy of the FTL table, and re-enable command fetching. The controller is further configured to mark one or more commands in a command database with an error condition upon the determining. After a boot of the connection, the controller is further configured to copy the FTL tables from the memory device to the HMB, work on commands, save FTL table differences between the HMB and the memory device, and update the FTL tables in the memory device.