A storage device for preventing occurrence of a read fail has a reduced overhead. The storage device includes a memory device with a plurality of memory blocks; and a memory controller for managing a fail block and a shared block as bad blocks. The fail block is determined to be a bad block among the plurality of memory blocks. The shared block is a memory block that shares a control signal for selecting the fail block in the memory device.

Exemplary methods, apparatuses, and systems include identifying that a first cache line from a first cache is subject to an operation that copies data from the first cache to a non-volatile memory. A first portion of the first cache line stores clean data and a second portion of the first cache line stores dirty data. A redundant copy of the dirty data is stored in a second cache line of the first cache. In response to identifying that the first cache line is subject to the operation, metadata associated with the redundant copy of the dirty data is used to copy the dirty data to a non-volatile memory while omitting the clean data.

A flash memory controller includes a read only memory (ROM) and a microprocessor. The ROM is arranged to store a program code. The microprocessor is arranged to execute the program code to control access of a flash memory module. When executing the program code, the microprocessor is arranged to perform operations of: monitoring data retention state of one or more blocks in the flash memory module by reading a last page of the one or more blocks to obtain time information regarding the one or more blocks, which is generated by the flash memory controller; and arranging a specific block to a garbage collection process if time information obtained from the last page of the specific block exceeds a threshold.

Embodiments of the present disclosure relate to a memory system, a memory controller, and a method for operating the same. Garbage collection is performed with regard to the memory device on the basis of a first amount of time and a second amount of time, the first amount of time being a period of time between triggering of first garbage collection and triggering of second garbage collection, and the second amount of time being an amount of time necessary to perform the second garbage collection. A ratio of the first amount of time to the second amount of time is determined as a target ratio value, and the second amount of time is determined to be equal to or longer than a minimum garbage collection operation time. Accordingly, efficient garbage collection can be performed, and the optimal time to perform garbage collection can be determined with regard to a configured performance drop value.

A memory device and methods for operating the same are provided. The memory device includes an array of memory cells, a non-volatile memory, and a controller. The controller is configured to receive a read command to read a data word from an address of the array and decode the address to generate a decoded address. The controller is further configured to retrieve response data from the decoded address of the array, retrieve a location indicia corresponding to the decoded address from the non-volatile memory, and verify that the location indicia corresponds to the address. The controller can optionally be further configured to indicate an error if the location indicia does not correspond to the address.

Methods, systems, and devices for adjustable media management are described. A media management operation may be performed at a first rate. During the media management operation, invalid data may be moved from a first block of memory cells to a second block of memory cells at the first rate to free space in the first block. Based on one or more conditions of the memory device, the rate that the media management operation is performed may be adjusted to a second rate. For example, the rate may be lowered based on a quantity of access operations performed on the memory device. Invalid data may continue to be moved from the first block of memory cells to the second block of memory cells at the second rate.

A non-volatile memory device includes a volatile memory, a non-volatile memory, and a controller. The controller is configured to map logical addresses for stored data to physical addresses of the stored data in the non-volatile memory using a logical-to-physical mapping structure stored partially in the volatile memory and at least partially in the non-volatile memory. The controller is configured to perform a storage capacity recovery operation for a region of the non-volatile memory that is selected based at least partially on a number of mappings for the region likely to be stored in the volatile memory for the storage capacity recovery operation.

In some examples, a device includes a set of data storage elements, wherein each data storage element of the set of data storage elements is associated with a respective valid address vector, and wherein a bit flip in any bit of any of the valid address vectors leads to one of a set of invalid address vectors not associated with any of the set of data storage elements. The device also includes a decoder configured to receive a first address vector as part of a request and to check whether the first address vector corresponds to one of the valid address vectors or to one of the invalid address vectors. The decoder is also configured to select an associated data storage element in response to receiving the request and in response to determining that the first address vector corresponds to one of the valid address vectors.

Methods, systems, and devices for page validity table colors for garbage collection are described. The memory system may obtain validity information and information associated with a characteristic for each page of a block of data and based on initiating a reorganization procedure on the block of data of the memory system. The memory system may move, for the reorganization procedure, a first set of pages of the block of data associated with a first value of the characteristic to a first portion of the memory system according to the validity information for the first set of pages. The memory system may move, for the reorganization procedure, a second set of pages of the block of data associated with a second value of the characteristic to a second portion of the memory system according to the validity information for the second set of pages.

A method and apparatus for performing access control of a memory device with aid of multi-stage garbage collection (GC) management are provided. The method includes: during a first GC stage, sending a first simple read command to the NV memory in order to try reading first valid data from a first source block, sending the first valid data into an internal buffer of the NV memory, for being programed into a first destination block, sending a second simple read command to the NV memory in order to try reading second valid data from the first source block, and in response to reading the second valid data from the first source block being unsuccessful, preventing retrying reading the second valid data from the first source block; completing at least one host-triggered operation; and during a second GC stage, retrying reading the second valid data from the first source block.