A data storage device includes a memory device including multiple memory blocks corresponding to multiple sub-regions and a memory controller. The memory controller updates content of a read count table in response to a read command with a transfer length greater than 1 for designating more than one logical address to be read. The read count table includes multiple fields recording a read count associated with one sub-region and content of the read count table is updated by increasing the read count(s) associated with the sub-region(s) that logical addresses designated in the read command belong to. The memory controller selects at least one sub-region according to the content of the read count table and performs a data rearrangement procedure to move data of the logical addresses belonging to the selected at least one sub-region to a first memory space of the memory device having continuous physical addresses.

Methods, systems, and devices for monitoring and adjusting access operations at a memory device are described to support integrating monitors or sensors for detecting memory device health issues, such as those resulting from device access or wear. The monitoring may include traffic monitoring of access operations performed at various components of the memory device, or may include sensors that may measure parameters of components of the memory device to detect wear. The traffic monitoring or the parameters measured by the sensors may be represented by a metric related to access operations for the memory device. The memory device may use the metric (e.g., along with a threshold) to determine whether to adjust a parameter associated with performing access operations received by the memory device, in order to implement a corrective action.

Systems and methods are disclosed including a processing device operatively coupled to memory device. The processing device performs operations comprising receiving a memory access command specifying a logical address; determining a physical address associated with the logical address; determining a portion of the memory device that is referenced by the physical address; determine an endurance factor associated with the portion; and increasing, by a value derived from the endurance factor, a media management metric associated with a management unit of the memory device, wherein the management unit is referenced by the physical address.

According to one embodiment, a storage system includes a controller. The controller receives, from a host, a write command including a block address indicating a first block in a plurality of blocks, and a page address indicating a first page of the first block. The controller writes data designated by the write command to the first page of the first block. The controller notifies the host 2 of a page address indicating a latest readable page which is included in pages of the first block, the pages containing data which was written by the host before the designated data was written to the first page, the latest readable page having become readable by writing the designated data to the first page.

Methods, systems, and devices for signal development caching in a memory device are described. In one example, a memory device in accordance with the described techniques may include a memory array, a sense amplifier array, and a signal development cache configured to store signals (e.g., cache signals, signal states) associated with logic states (e.g., memory states) that may be stored at the memory array (e.g., according to various read or write operations). In various examples, accessing the memory device may include accessing information from the signal development cache, or the memory array, or both, based on various mappings or operations of the memory device.

A memory sub-system can allocate a first portion of blocks of a memory device for storage of file system metadata based on a file system and a capacity of the memory device, write video data received from a host within a second portion of the blocks at a first data density, and write file system metadata within the first portion of the blocks at a second data density lesser than the first data density.

An electronic system includes: a key value storage device, configured to transfer user data, the key value storage device including: a non-volatile memory array accessed by a key value address, an interface circuit, coupled to the non-volatile memory array, configured to receive a key value transfer command, a volatile memory, coupled to the interface circuit and the non-volatile memory array, configured to reduce a number of copies of the user data in the non-volatile memory array, and a device processor, coupled to the interface circuit, configured to manage the non-volatile memory array, the volatile memory, and the interface circuit by a key value index tree, including a key value translation block, to access the user data.

A machine-implemented method for managing a flash storage system includes determining a projected life value for each of a plurality of flash memory devices in the flash storage system, wherein the projected life value for at least one of the plurality of flash memory devices is higher than the projected life value of at least another one of the plurality of flash memory devices. The method also includes determining operating parameters for each of the plurality of flash memory devices based on the respective projected life values for the plurality of flash memory devices. The method also includes configuring the plurality of flash memory devices based on the determined operating parameters.

A technique to control write operations in a logical partition. For example, a device can receive a user specified write threshold for the logical partition that is hosted on a pool of memory cells shared by a plurality of logical partitions in wear leveling. An accumulated amount of data written into the memory cells according to write requests addressing the logical partition is tracked. In response to the accumulated amount reaches the write threshold, further write requests addressing the logical partition can be blocked, rejected, and/or ignored. For example, the logical partition can be used to buffer data for time shift in playing back content streaming from a server. Write operations for time shift can be limited via the user specified threshold to prevent overuse of the total program erasure budget of the pool of memory cells shared with other logical partitions.

A logical-to-physical (L2P) data structure and a physical-to-logical (P2L) data structure are maintained. The L2P data structure comprises table entries that map a logical address to a physical address. The P2L data structure comprises data entries that map a physical address to a logical address. The P2L data entries also comprise a data move status, a base address, and a boundary indicator. A move operation is detected, wherein the move operation indicates that data referenced by a logical address is to be moved from a source physical address to a destination physical address. Responsive to detecting the move operation, the data move status associated with the source physical address in the P2L data structure is updated.