G06F2213/3852

METHOD AND APPARATUS FOR IMPLEMENTING HIGH-SPEED CONNECTIONS FOR LOGICAL DRIVES
20180024782 · 2018-01-25 ·

A method and apparatus may include receiving data from a first device. The data may be received via a first protocol. The method can also include converting the data to be transmitted via a second protocol. The second protocol may be a high-speed proprietary or standard protocol. The method can also include transmitting the data via the second protocol to a second device.

COMBINATION CONNECTOR

A combination connector for receiving DisplayPort and Universal Serial Bus (USB) Type-C type connectors. The combination connector includes a PCB with a first row of DisplayPort pins and a second row of USB pins on either side of the PCB. The second row of USB pins are provided on a projection along one edge of the PCB such that the projection can interface physically and electrically with a USB Type-C connector. A removable I/O baffle matching the profile of a DisplayPort connector can support the USB Type-C connector and provide electrical grounding. When the I/O baffle is removed, a DisplayPort connector can be inserted into the combination connector to interface with the first row of DisplayPort pins. A pair of detection pins within the connector allow the electronic device to identify a type of a connected connector and selectively enable power delivery and data transfer for an appropriate operating mode.

Hardware-Accelerated Protocol Conversion in an Automotive Gateway Controller

A network gateway in a vehicle connects heterogeneous networks and buses within the vehicle. The gateway implements hardware acceleration to accomplish protocol translation, e.g., between CAN, LIN, Flexray, and Ethernet buses and networks. In particular, the gateway provides hardware accelerated packet filtering, header lookup, and packet aggregation features.

Application virtualization in an emulator using an authentication processor

Apparatuses and methods for enabling an MFi stack and corresponding MFi application to be authenticated in an emulator operating using one or more processors/CPUs are presented. In one aspect, a computer may include a memory and processor configured to execute the operating system. The computer may include a USB bus coupled through USB interface to a dongle. The dongle may include an authentication coprocessor for use in an integrated circuit (I2C)-to-USB configuration, and an I2C-to-USB computer. Driver code running on the computer may manage the data exchanged between the authentication coprocessor and a virtual emulator on the computer. The emulator may include a USB-to-I2C driver that virtualizes the authentication coprocessor as an I2C device running with the MFi application like CarPlay.

METHOD AND DEVICE FOR MAPPING OF HIGH BANDWIDTH MEMORY BASE DIE
20250298766 · 2025-09-25 ·

Methods and devices are provided in which a link layer module of a base die in a chiplet receives signals in a memory controller (MC) interface format from MCs of the base die. The signals correspond to memory channels in the chiplet. The link layer module converts the signals into a signal in a die-to-die (D2D) packet format based on a mapping ratio between the MCs and the link layer module. The link layer module sends the signal in the D2D packet format to a D2D module of the base die. The chiplet is disposed on an interface or substrate of a superchip.