A system, disposed within a wearable hearing device, includes a sound producing device (SPD) driven by a driving voltage, a first sound sensing device, and a subtraction circuit. The first sound sensing device is configured to sense a combined sound pressure produced at least by the SPD and generate a sensed signal accordingly. The subtraction circuit has a first input terminal, a second input terminal, and a first output terminal. The first input terminal is coupled to the first sound sensing device, and the first output terminal is coupled to the SPD. A first phase delay between the driving voltage and the sensed signal is less than 60°.

Systems and methods are provided for measuring input voltage in an alternating current (AC) system is provided. The method includes measuring a half-cycle time of an AC signal by: detecting, using a zero crossing detector (ZCD), a first edge of the AC signal; in response to detecting the first edge, using a timer to determine a start time; detecting, using the microcontroller, a subsequent edge of the square wave output of ZCD signal; and, in response to detecting the subsequent edge, using the timer to determine a stop time and a length of time that lapsed from the start and stop times. The method further includes determining an overall value that corresponds to at least one length of time, determining, based on the overall value, an input voltage range that corresponds to the overall value, and using the input voltage to cause the AC system to take an action.

Systems and methods are provided for measuring input voltage in an alternating current (AC) system is provided. The method includes measuring a half-cycle time of an AC signal by: detecting, using a zero crossing detector (ZCD), a first edge of the AC signal; in response to detecting the first edge, using a timer to determine a start time; detecting, using the microcontroller, a subsequent edge of the square wave output of ZCD signal; and, in response to detecting the subsequent edge, using the timer to determine a stop time and a length of time that lapsed from the start and stop times. The method further includes determining an overall value that corresponds to at least one length of time, determining, based on the overall value, an input voltage range that corresponds to the overall value, and using the input voltage to cause the AC system to take an action.

Cognitive analysis using applied analog circuits including receiving, by a circuit, a first set of data results and a second set of data results; charging a first capacitor on the circuit with a first unit of charge for each of the first set of data results that indicates a positive data point; charging a second capacitor on the circuit with a second unit of charge for each of the second set of data results that indicates a positive data point; applying a charge from the first capacitor and a charge from the second capacitor to an analog unit of the circuit; and generating a signal on a circuit output indicating that a ratio of the positive data points in the first set of data results to the positive data points in the second set of data results is greater than a statistical significance.

Cognitive analysis using applied analog circuits including receiving, by a circuit, a first set of data results and a second set of data results; charging a first capacitor on the circuit with a first unit of charge for each of the first set of data results that indicates a positive data point; charging a second capacitor on the circuit with a second unit of charge for each of the second set of data results that indicates a positive data point; applying a charge from the first capacitor and a charge from the second capacitor to an analog unit of the circuit; and generating a signal on a circuit output indicating that a ratio of the positive data points in the first set of data results to the positive data points in the second set of data results is greater than a statistical significance.

Cognitive analysis using applied analog circuits including receiving, by a circuit, a first set of data results and a second set of data results; charging a first capacitor on the circuit with a first unit of charge for each of the first set of data results that indicates a positive data point; charging a second capacitor on the circuit with a second unit of charge for each of the second set of data results that indicates a positive data point; applying a charge from the first capacitor and a charge from the second capacitor to an analog unit of the circuit; and generating a signal on a circuit output indicating that a ratio of the positive data points in the first set of data results to the positive data points in the second set of data results is greater than a statistical significance.

Cognitive analysis using applied analog circuits including receiving, by a circuit, a first set of data results and a second set of data results; charging a first capacitor on the circuit with a first unit of charge for each of the first set of data results that indicates a positive data point; charging a second capacitor on the circuit with a second unit of charge for each of the second set of data results that indicates a positive data point; applying a charge from the first capacitor and a charge from the second capacitor to an analog unit of the circuit; and generating a signal on a circuit output indicating that a ratio of the positive data points in the first set of data results to the positive data points in the second set of data results is greater than a statistical significance.

A circuit includes an engine to compute analog multiplication results between vectors of a sub-matrix. An analog to digital converter (ADC) generates a digital value for the analog multiplication results computed by the engine. A shifter shifts the digital value of analog multiplication results a predetermined number of bits to generate a shifted result. An adder adds the shifted result to the digital value of a second multiplication result to generate a combined multiplication result.

A circuit includes an engine to compute analog multiplication results between vectors of a sub-matrix. An analog to digital converter (ADC) generates a digital value for the analog multiplication results computed by the engine. A shifter shifts the digital value of analog multiplication results a predetermined number of bits to generate a shifted result. An adder adds the shifted result to the digital value of a second multiplication result to generate a combined multiplication result.

A multiplier has a pair of charge reservoirs. The pair of charge reservoirs are connected in series. A first charge movement device induces charge movement to or from the pair of charge reservoirs at a same rate. A second charge movement device induces charge movement to or from one of the pair of reservoirs, the rate of charge movement programmed to one of add or remove charges at a rate proportional to the first charge movement device. The first charge movement device loads a first charge into a first of the pair of charge reservoirs during a first cycle. The first charge movement device and the second charge movement device remove charges at a proportional rate from the pair of charge reservoirs during a second cycle until the first of the pair of charge reservoirs is depleted of the first charge. The second charge reservoir thereafter holding the multiplied result.