A sensor includes groups of sense elements coupled to one another to form multiple Wheatstone bridges, each being configured to produce an output voltage across first and second output nodes. A signal interface circuit for the sensor includes switched capacitor structures, one each of the switched capacitor structures being associated with one each of the Wheatstone bridges. Each switched capacitor structure includes a capacitor having first and second terminals, a first switch for selectively interconnecting the first node of an associated Wheatstone bridge with the first terminal of the capacitor, and a second switch for selectively interconnecting the second node of the associated Wheatstone bridge with the second terminal of the capacitor. A switch state element toggles the first and second switches between a charge state and a readout state to provide a readout voltage that is equivalent to a summation of the voltage outputs of the Wheatstone bridges.

A circuit includes an engine to compute analog multiplication results between vectors of a sub-matrix, An analog to digital converter (ADC) generates a digital value for the analog multiplication results computed by the engine. A shifter shifts the digital value of analog multiplication results a predetermined number of bits to generate a shifted result. An adder adds the shifted result to the digital value of a second multiplication result to generate a combined multiplication result.

A circuit includes an engine to compute analog multiplication results between vectors of a sub-matrix, An analog to digital converter (ADC) generates a digital value for the analog multiplication results computed by the engine. A shifter shifts the digital value of analog multiplication results a predetermined number of bits to generate a shifted result. An adder adds the shifted result to the digital value of a second multiplication result to generate a combined multiplication result.

A magnetic device configured to perform an analog adder circuit function and including a plurality of magnetic units. Each magnetic unit includes n magnetic tunnel junctions electrically connected in series via a current line. Each magnetic tunnel junction includes a storage magnetic layer having a storage magnetization, a sense magnetic layer having a sense magnetization, and a tunnel barrier layer. Each magnetic unit also includes n input lines, each being configured to generate a magnetic field adapted for varying a direction of the sense magnetization and a resistance of the n magnetic tunnel junctions, based on an input. Each of the n magnetic units is configured to add said n inputs to generate an output signal that varies in response to the n resistances.

A magnetic device configured to perform an analog adder circuit function and including a plurality of magnetic units. Each magnetic unit includes n magnetic tunnel junctions electrically connected in series via a current line. Each magnetic tunnel junction includes a storage magnetic layer having a storage magnetization, a sense magnetic layer having a sense magnetization, and a tunnel barrier layer. Each magnetic unit also includes n input lines, each being configured to generate a magnetic field adapted for varying a direction of the sense magnetization and a resistance of the n magnetic tunnel junctions, based on an input. Each of the n magnetic units is configured to add said n inputs to generate an output signal that varies in response to the n resistances.

Cognitive analysis using applied analog circuits including receiving, by a circuit, a first set of data results and a second set of data results; charging a first capacitor on the circuit with a first unit of charge for each of the first set of data results that indicates a positive data point; charging a second capacitor on the circuit with a second unit of charge for each of the second set of data results that indicates a positive data point; applying a charge from the first capacitor and a charge from the second capacitor to an analog unit of the circuit; and generating a signal on a circuit output indicating that a ratio of the positive data points in the first set of data results to the positive data points in the second set of data results is greater than a statistical significance.

Cognitive analysis using applied analog circuits including receiving, by a circuit, a first set of data results and a second set of data results; charging a first capacitor on the circuit with a first unit of charge for each of the first set of data results that indicates a positive data point; charging a second capacitor on the circuit with a second unit of charge for each of the second set of data results that indicates a positive data point; applying a charge from the first capacitor and a charge from the second capacitor to an analog unit of the circuit; and generating a signal on a circuit output indicating that a ratio of the positive data points in the first set of data results to the positive data points in the second set of data results is greater than a statistical significance.

A specialized processing block on an integrated circuit includes a first and second arithmetic operator stage, an output coupled to another specialized processing block, and configurable interconnect circuitry which may be configured to route signals throughout the specialized processing block, including in and out of the first and second arithmetic operator stages. The configurable interconnect circuitry may further include multiplexer circuitry to route selected signals. The output of the specialized processing block that is coupled to another specialized processing block together with the configurable interconnect circuitry reduces the need to use resources outside the specialized processing block when implementing mathematical functions that require the use of more than one specialized processing block. An example for such mathematical functions include the implementation of vector (dot product) operations, FIR filters, or sum-of-product operations.

A sensor includes groups of sense elements coupled to one another to form multiple Wheatstone bridges, each being configured to produce an output voltage across first and second output nodes. A signal interface circuit for the sensor includes switched capacitor structures, one each of the switched capacitor structures being associated with one each of the Wheatstone bridges. Each switched capacitor structure includes a capacitor having first and second terminals, a first switch for selectively interconnecting the first node of an associated Wheatstone bridge with the first terminal of the capacitor, and a second switch for selectively interconnecting the second node of the associated Wheatstone bridge with the second terminal of the capacitor. A switch state element toggles the first and second switches between a charge state and a readout state to provide a readout voltage that is equivalent to a summation of the voltage outputs of the Wheatstone bridges.

An artificial intelligence processing device includes: a first variable-resistance nonvolatile storage element and a second variable-resistance nonvolatile storage element having different properties and provided on a single substrate. When successive applications of a voltage pulse with a same polarity and a same voltage are made, a proportion of an amount of change in conductance caused by a second application of the voltage pulse relative to an amount of change in conductance caused by a first application of the voltage pulse in the first variable-resistance nonvolatile storage element is less than a proportion of an amount of change in conductance caused by a second application of the voltage pulse relative to an amount of change in conductance caused by a first application of the voltage pulse in the second variable-resistance nonvolatile storage element.