Patent classifications
G09G5/006
Artificial reality system using superframes to communicate surface data
This disclosure describes efficient communication of surface texture data between system on a chip (SOC) integrated circuits. An example system includes a first integrated circuit and a second integrated circuit communicatively coupled to the first integrated circuit by a video communication interface. The first integrated generates a superframe in a video frame of the video communication interface for transmission to the second integrated circuit. The superframe includes multiple subframe payloads that carry surface texture data to be updated in the frame and corresponding subframe headers that include parameters of the subframe payloads. The second integrated circuit includes a direct access memory (DMA) controller. The DMA upon receipt of the superframe, writes the surface texture data within each of the subframe payloads directly to an allocated location in memory based on the parameters included in the corresponding one of the subframe headers.
Electronic device and screen sharing method using same
The present invention relates to an electronic device and a screen sharing method using same. An electronic device according to various embodiments of the present invention comprises a communication circuit, a touch screen display, an audio processing circuit, memory and a processor which is electrically connected to the communication circuit, the touch screen display, the audio processing circuit and the memory. The processor can be configured so as to display a first screen and a second screen on the touch screen display, recognize an external electronic device connected by means of the communication circuit if an input for performing a screen sharing function is detected by means of the touch screen display, and transmit, to the recognized external electronic device, the first screen and/or the second screen and at least one audio signal among audio signals corresponding to the first screen and the second screen. Other various embodiments other than the various embodiments disclosed in the present invention are possible.
Video signal compression processor, video signal decompression processor, video signal transmission system, method of compressing video signal, and method of decompressing video signal
It is configured to include a video signal compression unit that compresses a video signal for displaying, on an image inspection monitor, an image inspection screen including a first area for displaying a medical image and a second area for displaying information other than the medical image, and a transmitting unit that transmits, via a communication network, the video signal having been compressed, and the video signal compression unit compresses, in each frame of the video signal, the second area of the image inspection screen at a compression rate higher than a compression rate of the first area.
Receiving Card and Display Control Card Component
Embodiments of the disclosure relate to a receiving card, which includes: a circuit board and a programmable logic device, a memory device, a plug-in component, a physical layer transceiver group and a plurality of Ethernet interfaces arranged on the circuit board. The memory device and the plug-in component are electrically connected with the programmable logic device; the plurality of Ethernet interfaces are respectively and electrically connected with a plurality of SerDes channels configured by the programmable logic device through the physical layer transceiver group; each of the plurality of SerDes channels includes two pairs of differential signal lines, and one of the two pairs of differential signal lines is used for transmitting data and the other pair of differential signal lines is used for receiving data.
Control signal transmission circuit and control signal receiving circuit for audio/video interface
A control signal transmission circuit and a control signal receiving circuit for an audio/video interface are provided. The control signal transmission circuit includes an audio/video interface encoder, a signal packaging circuit and a data allocator. The audio/video interface encoder is configured to receive an audio packet and supports a user-defined packet format. The signal packaging circuit is configured to receive a first control signal and package the first control signal into a control data packet according to the user-defined packet format. The data allocator is configured to receive a video data and a second control signal and to mix the second control signal and the video data to generate a mixed data packet. The audio/video interface encoder packages the control data packet, the mixed data packet and the audio packet according to an audio/video transmission protocol to generate an audio/video and control data.
METHOD AND APPARATUS FOR CONTROLLING DISPLAY FREQUENCY OF DISPLAY SCREEN, AND ELECTRONIC DEVICE
A method and apparatus for controlling a display frequency of a display screen, and an electronic device are provided. The method includes: (S101) determining, in a command mode in response to no image data being transmitted to the display screen by an application processor currently, whether the display screen is in a self-refreshing state; (S102) transmitting, in response to the display screen being in the self-refreshing state, notification information to the application processor after self-refreshing of the display screen is completed, the notification information being used for notifying the application processor to transmit the image data to the display screen; and (S103) receiving the image data transmitted by the application processor, and updating the display frequency with a first frequency at which the application processor transmits the image data.
DEVICE, SYSTEM, AND METHOD FOR BUFFERING PROCESSOR INTERRUPTS
Disclosed herein is system for buffering processor interrupts from active input devices, such as Bluetooth devices, so that they are aligned with a video refresh rate. The system may include a processor that operates in a first operating mode (e.g., a low power mode) and, in response to an interrupt request, switch to a second operating mode (e.g., a higher power mode). The first operating mode may be different from the second operating mode (e.g., each with a different level of power consumption). The system may also include a video subsystem, in communication with the processor, that provides video information at a refresh rate. The system may also include an input subsystem, such as a wireless communication system, in communication with the processor, that receives an activity trigger representing an activity of a input device, such as a human input device, and provides, based on the refresh rate, the activity trigger to the processor as the interrupt request.
METHOD AND DEVICE FOR SEAMLESS MODE TRANSITION BETWEEN COMMAND MODE AND VIDEO MODE
A method of seamlessly switching over between the command mode and the video mode includes receiving a command for switching over from the command mode to the video mode; generating a sampling value by measuring a time interval between a point in time of an internal synchronization signal used in the command mode and a point in time of an external synchronization signal received in the video mode; generating a parameter for shifting the internal synchronization signal based on the sampling value; shifting the internal synchronization signal to synchronize with the external synchronization signal based on the parameter; and switching over from the command mode to the video mode when the internal synchronization signal of the command mode synchronizes with the external synchronization signal. According to the disclosure, while driving a display.
Output apparatus, output system, and method of changing format information
An output apparatus includes circuitry to receive content data from a transmission source of the content data. The circuitry checks first format information for the content data to be output. The circuitry changes second format information of the content data to the first format information. The second format information is supported by a capture board. The capture board is connected between the transmission source and the output apparatus. The circuitry outputs the content data.
Synchronous Display Pipeline Systems and Methods
An electronic device may include a first display pipeline that may output image data via an output path. The electronic device may include first frame merge circuitry coupled to the output path. The electronic device may also include a first multiplexer coupled to the first frame merge circuitry and to the output path. The first multiplexer may transmit the image data from the output path to an electronic display, and, in response to a first control signal associated with the first frame merge circuitry generating a merged output, the first multiplexer transmits the merged output to the electronic display.