While reducing memory usage, page related data is made available. Data obtaining means (101) of an electronic book display device (1) obtains electronic book data including a plurality of pages stored in storing means (100) for storing the electronic book data. Display controlling means (103) displays, on display means (14), one or more pages specified in the plurality of pages based on the electronic book data obtained by the data obtaining means (101). Page related data generating means (104) generates, before the display means (14) displays at least one of preceding and succeeding pages to the one or more pages displayed on the display means (14), page related data based on the at least one of the pages and writes the generated page related data in the storing means (100).

Methods and apparatus relating to an adaptive multibit bus for energy optimization are described. In an embodiment, a 1-bit interconnect of a processor is caused to select between a plurality of operational modes. The plurality of operational modes comprises a first mode and a second mode. The first mode causes transmission of a single bit over the 1-bit interconnect at a first frequency and the second mode causes transmission of a plurality of bits over the 1-bit interconnect at a second frequency based at least in part on a determination that an operating voltage of the 1-bit interconnect is at a high voltage level and that the second frequency is lower than the first frequency. Other embodiments are also disclosed and claimed.

Methods, systems and apparatuses may provide for technology that detects an immediate flip request associated with a current frame of a video signal and generates a modified frame in response to the immediate flip request, wherein the modified frame includes a plurality of scanlines containing transition content associated with the current frame and the successive frame. The technology may also send the modified frame to the display.

Disclosed is a system for controlling the visual appearance of a sensor cover on a vehicle. The system includes a processor, and a sensor cover display disposed on the sensor cover and in communication with the processor. A color-changing element is included in the sensor cover display. The processor is configured to provide a signal representing a desired color or pattern to the color-changing element, and the color-changing element is configured to render the desired color or pattern.

A color selection and display device includes a display, a user interface configured for receiving input data identifying a selected color, an orientation sensor configured to generate an orientation signal based on an orientation of the color selection and display device, and a memory storing a virtual paint chip arrangement. Relative locations of individual colors within the virtual paint chip arrangement correspond to a real world retail paint chip display. The device further includes at least one processor configured to receive the orientation signal and determine an orientation of the color selection and display device, and to control the display to automatically display the virtual paint chip arrangement based on the orientation of the color selection and display device. The selected color is highlighted in the virtual paint chip arrangement.

Methods and apparatus relating to an adaptive multibit bus for energy optimization are described. In an embodiment, a 1-bit interconnect of a processor is caused to select between a plurality of operational modes. The plurality of operational modes comprises a first mode and a second mode. The first mode causes transmission of a single bit over the 1-bit interconnect at a first frequency and the second mode causes transmission of a plurality of bits over the 1-bit interconnect at a second frequency based at least in part on a determination that an operating voltage of the 1-bit interconnect is at a high voltage level and that the second frequency is lower than the first frequency. Other embodiments are also disclosed and claimed.

Disclosed are a display panel and an electronic device. The display panel includes sub-pixels arranged in an array, wherein each pixel row of the sub-pixels comprises 3n sub-pixels, with every six adjacent sub-pixels of the pixel row forming a pixel group, n2, and the six adjacent sub-pixels of the pixel group are arranged in sequential order in a first direction parallel to the row direction. The display panel further includes a controller, where in a first display mode the controller controls each of the sub-pixels to be charged to emit light; and in a second display mode the controller controls at most two sub-pixels of each of the pixel groups in at least one of the pixel rows to not emit light, and controls at most two sub-pixels of the pixel group which have same order in two adjacent frames of pictures to not emit light.

A method and apparatus are provided for generating image data for output to a display device such as an HUD or HMD defining pixels of an image for display. The image data for each pixel defines a predetermined background colour or a non-background colour. In an example implementation, the image generator comprises at least one image rendering module and a memory accessible by the at least one rendering module providing at least one frame buffer in which image data may be assembled. The at least one rendering module is arranged to process or to generate image data using a tile representation of an image for display, each tile comprising image data defining each of a predetermined number of pixels of the image. Furthermore, the at least one rendering module is arranged to store image data for the pixels of a tile in the at least one frame buffer only in the event that one or more pixels of the tile have respective image data defining a non-background colour or are enabled for display with a non-background colour, the pixels in the tile being otherwise assumed to be intended for display with the predetermined background colour. In this way the need to transfer data to and from the memory when generating and assembling image data is reduced, so reducing image rendering time.

A display device includes a display panel including a pixel, a driving controller that receives an image signal and outputs an image data signal in which the image signal is compensated, and a data driving circuit that provides the pixel with a data signal corresponding to the image data signal. The driving controller includes a memory, a hysteresis calculator that calculates a current hysteresis state value of a current frame based on the image signal and a previous hysteresis state value of a previous frame, which is stored in the memory, and stores the current hysteresis state value in the memory, and a compensator that calculates a compensation value based on the image signal and the previous hysteresis state value stored in the memory and compensates for the image signal depending on the compensation value to output the image data signal.

A novel display system includes a host and a display. In a particular embodiment the host includes a data scaler and a dual frame buffer. Frames of image data are down-scaled before being transferred to the display, and is up-scaled while being loaded into the frame buffer or the display. The down-scaled frames of image data include less data than the frames of image data. In another embodiment, the process of loading the image data into the display begins before an entire frame of data is loaded into the frame buffer. Increasingly sized portions of the image data, each corresponding to a different color field, are asserted on the display and displayed one at a time. The portions of the frame that were not previously displayed are displayed along with the initial portions of a subsequent frame.