Methods are provided for creating objects in a way that permits an API client to explicitly participate in memory management for an object created using the API. Methods for managing data object memory include requesting memory requirements for an object using an API and expressly allocating a memory location for the object based on the memory requirements. Methods are also provided for cloning objects such that a state of the object remains unchanged from the original object to the cloned object or can be explicitly specified.

An electronic device. The electronic device includes a first processor configured to generate a first display signal, and a second processor configured to generate a second display signal and output to a display area. The second processor includes a forwarding module, the first processor is connected to the forwarding module, and the first display signal generated by the first processor is output to the display area through the forwarding module.

Display filters, including color filters, can be enabled in collaborative environments. When a user of an end user device desires to have a color filter applied, a windowing system or other source of graphics data can render a frame via a graphics driver. Once the frame is rendered, the graphics driver can enable a collaboration tool to capture the frame and share it via a collaboration solution. Separately from the rendering of the frame, the windowing system can leverage a color filter module to directly apply a color filter to the frame. Once the color filter is applied, the windowing system can cause the frame to be displayed locally. Because the graphics driver is not used to apply the color filter, the color filter will not be applied to any frame that the collaboration tool captures and shares.

Dynamic refresh rate (DRR) switching is used to dynamically update a refresh rate of content presented on an interface. When a first application and a second application are presented on a user interface at a first refresh rate; a request may be received to temporarily boost the first refresh rate to a second, higher, refresh rate. DRR switching is initiated as the first refresh rate is temporarily boosted to a second refresh rate. Applications that are opted in to the second refresh rate receive signals to refresh content at the second refresh rate, while applications that are not opted in to the second refresh rate receive signals to refresh content at a virtualized refresh rate that matches the first refresh rate. Thus, the first application refreshes content at the first refresh rate and the second application refreshes content at the second, higher refresh rate, providing a smooth user experience without unnecessarily utilizing power consumption.

A dual-system device and writing method and apparatus thereof, and interactive intelligent tablet includes a first system and a second system receiving touch data, where the data rendering speed of the first system is faster than that of the second system, and the data processing speed of the second system is faster than that of the first system; the first system acquiring data to be rendered from a target storage area, where the data to be rendered is generated by the second system according to the touch data and stored in the target storage area; the first system rendering the data to be rendered to obtain handwriting data to be displayed, and transmitting the handwriting data to be displayed to a display screen of the dual-system device for display. The disclosure solves the technical problem of writing delay of an external system when using dual-system to perform writing.

A method for a low voltage drive circuit (LVDC) begins by receiving data from one or more other low voltage drive circuits (LVDCs) using a bus with varying loading at one or more frequencies and continues by sampling one or more data values of the data to produce a sampled digital data value, converting the sampled digital data value to a binary string and writing the binary string to a buffer. The method continues by writing one or more additional binary strings to the buffer to form a digital word, outputting the digital word to a digital converter circuit and formatting the digital word to create a formatted digital word. The method continues by writing the formatted digital word to a second buffer, writing additional formatted digital words to the second buffer to form a data packet and finally, outputting the data packet to a host device.

This disclosure describes efficient communication of surface texture data between system on a chip (SOC) integrated circuits. An example system includes a first integrated circuit and a second integrated circuit communicatively coupled to the first integrated circuit by a video communication interface. The first integrated generates a superframe in a video frame of the video communication interface for transmission to the second integrated circuit. The superframe includes multiple subframe payloads that carry surface texture data to be updated in the frame and corresponding subframe headers that include parameters of the subframe payloads. The second integrated circuit includes a direct access memory (DMA) controller. The DMA upon receipt of the superframe, writes the surface texture data within each of the subframe payloads directly to an allocated location in memory based on the parameters included in the corresponding one of the subframe headers.

A disclosed technique includes transmitting data in a first buffer associated with a first display pipe to a first display associated with the first display pipe; transmitting data in a second buffer associated with a second display pipe to the first display; requesting wake-up of a memory; and refilling one or both of the first buffer and the second buffer from the memory.

A multi-screen display control device includes a plurality of graphics processing units (GPUs) and a watchdog chip. The GPUs transform image data that a host transfers to the multi-screen display control device through a universal serial bus (USB) interface into a plurality of high-definition multi-media interface (HDMI) sub-images to be displayed by a plurality of screens. The watchdog chip is coupled to the GPUs and, when any of the GPUs crashes, the watchdog chip outputs a reset signal to reset all of the GPUs.

Techniques are disclosed relating to compression of data stored at different cache levels. In some embodiments, a memory system implements a storage hierarchy that includes first cache circuitry and second cache circuitry at different levels of the hierarchy. Processor circuitry generates write data to be written to the memory system. In some embodiments, first compression circuitry is configured to compress a first block of write data in response to full accumulation of the first block in the first cache circuitry and second compression circuitry is configured to compress a second block of write data in response to full accumulation of the second block in the second cache circuitry. Write circuitry may write the first and second compressed blocks of data in a single combined write to a higher level in the storage hierarchy.