An organic light emitting diode display with improved aperture ratio includes: a substrate; first and second pixels disposed in a first row of the substrate and third and fourth pixels disposed in a second row adjacent to the first row and respectively disposed in the same columns as the first and second pixels; a scan line and a previous scan line applying a scan signal and a previous scan signal, respectively, to the pixel units; a data line and a driving voltage line applying a data signal and a driving voltage, respectively, to the pixel units; and a common initialization voltage line disposed between the first and second pixels and between the third and fourth pixels, commonly connected to the pixel units, and applying an initialization voltage. One common initialization contact hole connected to all pixels units and one initialization voltage line connected to the common initialization contact hole are surrounded by the pixel units.

A gate driving unit includes an input module, a first output module, a second output module, a feedback module, and an output-controlling module. The input module outputs a previous level-transferring signal into a first node. The first output module outputs a present level-transferring signal. The second output module outputs a scan signal. The feedback module outputs a present-level feedback signal. The output-controlling module pulls up potential of the scan signal to a first direct-current high voltage and pulls up potential of the present level-transferring signal to a second direct-current high voltage.

A shift register and its driving method, and a display panel are provided in the present disclosure. The shift register includes a first pull-down module, configured to, in response to a conduction level of a first node, transmit a first clock signal of a first clock signal output terminal to a first output terminal; further includes a first pull-up module, configured to, in response to a conduction level of a second node, transmit a first cut-off level signal of a first cut-off level voltage terminal to the first output terminal; and further includes a first node control module, configured to, when the first cut-off level signal is outputted at the first output terminal, transmit a second cut-off level voltage signal outputted from one of an input terminal and a second cut-off level voltage terminal to the first node.

A display device includes: scan lines extending in a first direction; data lines extending in a second direction intersecting the first direction and receiving data voltages; first driving voltage lines extending in the second direction and receiving a first driving voltage; second driving voltage lines extending in the second direction and receiving a second driving voltage different from the first driving voltage; and pixels connected to the scan and data lines. Each of the pixels includes first, second, and third subpixels arranged in the first direction. The first driving voltage lines and the second driving voltage lines are alternately arranged in the first direction. A location of the first driving voltage line in a first pixel differs from a location of the second driving voltage line in a second pixel. The second pixel is adjacent to the first pixel in the first direction.

An organic light emitting display device includes a plurality of pixels. Each of the pixels includes an organic light emitting diode, first to third transistors, a storage capacitor, and a first capacitor. The second transistor includes a gate electrode receiving a first scan signal, a first electrode receiving a data signal, and a second electrode connected to a first electrode of the first transistor. The third transistor includes a gate electrode receiving a second scan signal, a first electrode connected to a second electrode of the first transistor, and a second electrode connected to a gate electrode of the first transistor. The storage capacitor includes a first electrode receiving a power voltage and a second electrode connected to the gate electrode of the first transistor. The first capacitor includes a first electrode connected to the gate electrode of the third transistor and a second electrode receiving the power voltage.

A display apparatus that prevents visual recognition of flickering in each of display areas having different resolutions includes a first pixel circuit, a first display element, a second pixel circuit, and a second display element. The first pixel circuit includes: a first driving transistor configured to control a first current that flows to the first display element; and a first initializing transistor configured to apply a first initializing voltage to a gate of the first driving transistor in response to a first scan signal. The second pixel circuit includes: a second driving transistor configured to control a second current that flows to the second display element; and a second initializing transistor configured to apply a second initializing voltage having a level different from a level of the first initializing voltage to a gate of the second driving transistor in response to the first scan signal.

A pixel includes: a light emitting element; a first transistor connected between a first node electrically connected to a first driving power source and a second node electrically connected to an anode electrode of the light emitting element, the first transistor to control a driving current; a second transistor connected between a data line and the first node; a third transistor connected between the second node and a third node connected to a gate of the first transistor; a fourth transistor connected between the third node and a first initialization power source; a fifth transistor connected between a second initialization power source and the anode electrode of the light emitting element, the fifth transistor being turned on by a scan signal provided to a scan line; and a boosting capacitor connected between the scan line and the third node.

A method for driving display panel includes: for one of adjacent two frames of displayed images, when scanning odd-numbered row of sub-pixels, inputting data signals to the data lines coupled to the data selector in first order by a data selector; when scanning even-numbered row of sub-pixels, inputting data signals to the data lines coupled to the data selector in second order by the data selector; first and second orders each represents an order of inputting data signals to the data lines; first order is opposite to second order; for the other of the adjacent two frames of displayed images, when scanning odd-numbered row of sub-pixels, inputting data signals to the data lines coupled to the data selector in second order by the data selector; when scanning even-numbered row of sub-pixels, inputting data signals to the data lines coupled to the data selector in first order by the data selector.

A display device may include a timing controller, a level shifter, a gate driver, and a display panel. The timing controller may generate a first on-clock signal, a first off-clock signal, and a first output control signal. The level shifter may generate a first-type gate clock signal. A rising edge of the first-type gate clock signal and a falling edge of the first-type gate clock signal may be respectively synchronized with a rising edge of the first on-clock signal and a falling edge of the first off-clock signal. The gate driver may output first-type gate signals based on the first-type gate clock signal. The display panel may include pixels. The pixels may emit lights in response to the first-type gate signals. The level shifter may partially block a pulse of the first-type gate clock signal based on the first output control signal to generate sub-pulses.

A display device includes a display panel, a scan driver, a data compensator, and a data driver. The display panel includes a first area and a second area distinguished from each other along a scan direction. Each of the first and second areas include pixels. The scan driver is configured to sequentially provide scan signals to the display panel along the scan direction. The data compensator is configured to: detect a pattern in which a difference between adjacent grayscale values in image data is greater than a reference value; and generate compensated image data by compensating for grayscale values corresponding to the second area in the image data based on the pattern corresponding to the first area. The data driver is configured to: generate data signals based on the compensated image data; and provide the data signals to the display panel.