A display device includes at least a first luminance range and a second luminance range which includes a luminance different from the first luminance range. In a boundary area of a second dimming range corresponding to the second luminance range and which is adjacent to a first dimming range corresponding to the first luminance range, a reference luminance emitted from a pixel is maintained as a first constant luminance value, and an off-duty number, which is the number of periods in which the pixel is turned off during one frame, is gradually increased by an emission control signal.

In one embodiment, a computing system may access an image to be displayed by a display. The system may determine one or more first characteristics associated with a content of the image. The one or more first characteristics may include a contrast level of the content of the image with respect to a background of the image. The system may determine a first display persistence time period for the display to display the image based on the one or more first characteristics associated with the content of the image. The system may configure the display to display the image using the first display persistence time period.

A display device includes a display panel including a gate line, a data line, and a pixel at a crossing region of the gate line and the data line, a timing controller configured to generate a gate driving control signal, a data driving control signal, and a power control signal based on a display period corresponding to a time interval of frames, a gate driver configured to provide a gate signal to the pixel through the gate line based on the gate driving control signal, a data driver configured to provide a data signal to the pixel through the data line based on the data driving control signal, and a power supply configured to generate a power voltage to drive the pixel, and configured to adjust the power voltage based on the power control signal during the display period.

A display device may include a first pixel coupled to an emission control line, and an emission control stage for selectively coupling the emission control line to a first or second supply voltage line. The emission control stage may include: a first emission control transistor including a first electrode coupled to the first supply voltage line, a second electrode coupled to the emission control line, and a main gate electrode coupled to a first node; a second emission control transistor including a first electrode coupled to the emission control line, a second electrode coupled to the second supply voltage line, and a main gate electrode coupled to a second node; and a third emission control transistor including a first electrode coupled to the first supply voltage line, a second electrode coupled to the first node, a main gate electrode coupled to the second node, and a sub-gate electrode.

A display panel includes a pixel circuit, a driving circuit, and a clock signal line. The driving circuit is configured to provide a control signal to the pixel circuit. The clock signal line is configured to provide a clock signal for the driving circuit. A data refresh period of the pixel circuit includes a data writing stage and a holding stage. The holding stage includes N stages arranged in sequence, N≥1. When the pixel circuit is operated in the data writing stage, a clock pulse frequency of the clock signal is a first frequency F1. When the pixel circuit is operated in the holding stage, in at least one stage of the N stages, the clock pulse frequency of the clock signal is a second frequency F2.

A display apparatus includes a display panel and an emission time control chip. The display panel has a plurality of sub-pixels, and each sub-pixel includes a light emitting device, a pixel driving circuit, and an emission time control circuit. The pixel driving circuit is configured to provide a driving signal for driving the light emitting device to emit light. The emission time control circuit is configured to connect the pixel driving circuit to the light emitting device in response to an emission control signal to control a duration of transmission of the driving signal to the light emitting device. The light emitting time control chip includes at least one output terminal. The emission time control chip is configured to transmit emission time control signals to the light emitting time control circuits of the plurality of sub-pixels through the at least one output terminal.

A non-transitory computer-readable storage medium comprising instructions stored thereon. When executed by at least one processor, the instructions ban be configured to cause a computing device to, in response to an instruction to transition from a first refresh rate to a second refresh rate, modify a transitional frame. The modifying the transitional frame can include refreshing a first row in a display with a first adjustment to a peak signal of at least one pixel in the first row, and refreshing a second row in the display with a second adjustment to a peak signal of at least one pixel in the second row, the second row being refreshed after the second row, the second adjustment being greater than the first adjustment.

A display apparatus includes a display panel displaying an image based on an input image data, a data driver outputting a data voltage to a data line, and a driving controller determining a driving frequency of the display panel based on the input image data. The driving controller includes a flicker value storage configured to store flicker values for grayscale values corresponding to the input image data, a voltage drop determiner configured to adjust a flicker value of the flicker values based on a voltage drop of the display panel, a still image determiner configured to determine whether the input image data is a still image or a video image, and a driving frequency determiner configured to determine the driving frequency of the display panel using the flicker value based on the input image data being the still image.

Disclosed is an electroluminescent display device using a variable refresh rate (VRR) mode. The purpose of the present disclosure is to reduce the occurrence of a difference in luminance at a time point of a refresh rate change, thereby preventing viewers from perceiving the variation of the refresh rate.

A display device is disclosed. The display device includes a display panel, a backlight module, and a processor. The display panel displays a display screen. The backlight module provides a backlight brightness to the display panel. The processor generates the display screen and determines the backlight brightness corresponding to the display screen. The processor dynamically adjusts a size and a position of several display areas on the display screen based on an instant state of the continuous image signal respectively. The processor determines several backlight areas corresponding to several display areas respectively, and the processor generates several backlight control signals corresponding to several backlight areas respectively based on the display setting and several image contents.