A display device includes a display panel including a pixel, a driving controller that receives an image signal and outputs an image data signal in which the image signal is compensated, and a data driving circuit that provides the pixel with a data signal corresponding to the image data signal. The driving controller includes a memory, a hysteresis calculator that calculates a current hysteresis state value of a current frame based on the image signal and a previous hysteresis state value of a previous frame, which is stored in the memory, and stores the current hysteresis state value in the memory, and a compensator that calculates a compensation value based on the image signal and the previous hysteresis state value stored in the memory and compensates for the image signal depending on the compensation value to output the image data signal.

An operational amplifier compensation circuit includes; a first transistor activated/deactivated in response to a signal level difference between an input signal applied to an operational amplifier and an output signal provided by the operational amplifier, a first signal amplifying circuit including a second transistor and a first load, wherein the first signal amplifying circuit is configured to generate a first gate voltage amplified in response to the voltage level difference between the input signal and the output signal in relation to an internal resistance of the second transistor and a resistance of the first load when the first transistor is activated, and a third transistor configured to generate a first compensation current in response to the amplified first gate voltage and provide the first compensation current to the operational amplifier.

Embodiments of the subject matter described herein relate to a wireless programmable media processing system. In the media processing system, a processing unit in a computing device generates a frame to be displayed based on a graphics content for an application running on the computing device. The frame to be displayed is then divided into a plurality of block groups which are compressed. The plurality of compressed block groups are sent to a graphics display device over a wireless link. In this manner, both the generation and the compression of the frame to be displayed may be completed at the same processing unit in the computing device, which avoids data copying and simplifies processing operations. Thereby, the data processing speed and efficiency is improved significantly.

Embodiments of this application relate to the field of image processing and display technologies, and provide a method for image processing based on vertical synchronization signals and an electronic device, to shorten a response latency of the electronic device and improve fluency (such as a touch latency) of the electronic device. A specific solution includes: drawing, by the electronic device, one or more first layers in response to a first vertical synchronization signal, and rendering the one or more first layers, and after rendering the one or more first layers, performing layer composing on the rendered one or more first layers to obtain a first image frame; and refreshing and displaying the first image frame in response to a second vertical synchronization signal.

A display device includes: a display panel with pixel rows; a light source device having light emission regions; and a controller configured to control light emission of the light emission regions. A second period is shorter than a first period. The first period is a period from a drive timing of one or more pixel rows that are driven first to a drive timing of one or more other pixel rows that are driven last. The second period is a period from a light emission timing of one or more light emission regions that emit light first to a light emission timing of one or more other light emission regions that emit light last. The light emission timing of the one or more light emission regions that emit light first is different from the light emission timing of the one or more other light emission regions that emit light last.

The present disclosure provides a charging circuitry, a display device, a wearable device, a display driving method and a display driving device. The charging circuitry includes: a driving sub-circuitry configured to receive an image signal and convert the image signal into a display driving signal to be outputted to a data line of the array substrate; a circuitry power supply voltage end configured to apply a direct current voltage to the driving sub-circuitry; and a switch sub-circuitry arranged on a connection circuitry between the circuitry power supply voltage end and the driving sub-circuitry, and configured to be switched between a first state where the circuitry power supply voltage end is electrically coupled to the driving sub-circuitry and a second state where the circuitry power supply voltage end is electrically decoupled from the driving sub-circuitry.

A scan driving circuit and a display panel include an even number of signal wires divided into an odd group of signal wires and an even group of signal wires; and a plurality of scanning sub-circuits, each scanning sub-circuit including an assembly coupled between the odd group of signal wires and the even group of signal wires and including a register part and a pull-down part, and a load coupled between the register part and the pull-down part; wherein the register parts and the pull-down parts that are configured on a same side of the loads are alternately arranged, and any two of the register parts that are separated by N of the scanning sub-circuits and configured on one side of the loads are cascaded with each other, wherein N is half of a total number of the even number of signal wires.

A display device can include a display panel configured to display images; and a data driver configured to receive digital data signals, determine a difference value between two consecutive data signals for data voltages to be output based on the digital data signals, change a voltage of the data voltages based on the difference value to generate a changed data voltage, and output the changed data voltage.

A display device capable of improving image quality is provided. A display device includes a plurality of pixel blocks in a display region. The pixel blocks each include a first circuit and a plurality of second circuits. The first circuit has a function of adding a plurality of pieces of data supplied from a source driver. The second circuit includes a display element and has a function of performing display in accordance with the added data. One pixel has a configuration including one second circuit and an component of the first circuit that is shared. When the first circuit is shared by a plurality of pixels, the aperture ratio can be increased.

PWM-frame rate misalignment is mitigated through implementation of a discrete variable refresh rate (VRR) scheme. A target frame rate is limited to a frame rate selected from only those frame rates that facilitate alignment of each frame period to a specified edge of a PWM cycle of a brightness control signal of a display panel. This alignment results in each frame period at the selected frame rate starting at a same point in a corresponding PWM cycle and ending at a same point in a corresponding PWM cycle to help ensure a constant effective duty cycle across each successive frame period, which in turn mitigates perception of flicker that otherwise would arise. Further, the discrete VRR scheme can employ a compensation mode for compensating for the delay in rendering or otherwise obtaining a frame for display so as to maintain a consistent duty cycle in the brightness control signal.