Patent classifications
G09G2360/121
Disparity cache
Methods, devices, systems and computer software/program code products improve the reliability of scene reconstruction through the use of a persistent store or cache to retain scene information observed across one or more previous frames.
System, method and computer program product for generating remote views in a virtual mobile device platform using efficient color space conversion and frame encoding
Embodiments disclosed herein provide systems, methods and computer readable media for generating remote views in a virtual mobile device platform. A virtual mobile device platform may be coupled to a physical mobile device over a network and generate frames of data for generating views on the physical device. These frames can be generated using an efficient display encoding pipeline on the virtual mobile device platform. Such efficiencies may include, for example, the synchronization of various processes or operations, the governing of various processing rates, the elimination of duplicative or redundant processing, the application of different encoding schemes, the efficient detection of duplicative or redundant data or the combination of certain operations.
Method for displaying handwritten input content, electronic device and computer storage medium
Disclosed are a method for displaying handwritten input content, an electronic device and a non-volatile computer readable storage medium. The method includes: acquiring handwritten input content; modifying image stored in a display cache based on the handwritten input content, and synchronizing a modified image to a display screen; and drawing the handwritten input content in a custom graphic layer located above other graphic layers in a system cache, performing a graphic layer merging operation for the other graphic layers and the custom graphic layer, and replacing the modified image stored in the display cache in response to a result of the operation.
Switching method and switching device for display channel, display driving device and display device
The present disclosure provides a method and device for switching a display channel, a display driving device and a display device. The method includes: sending a first switching signal to a write controller of a current display channel when a switching instruction for switching from the current display channel to a target display channel is received; acquiring a frame address in which final write operation of data is completed, and taking the frame address as a first address and a next frame address as a second address; sending a second switching signal to a write controller of the target display channel; and sending a third switching signal to a read controller.
SYSTEMS AND METHODS FOR UPDATING AN IMAGE DISPLAYED ON A DISPLAY DEVICE
Devices, systems and methods are provided for updating an image based on a display device. The display device comprising pixels in a pixel array. The system comprising a display subsystem for executing commands and displaying images, said display subsystem comprising a parser for receiving the image frame data, wherein the parser extracts updated image data and the commands; a storage device for storing the updated image data in a updated cache location according to the commands; a loader for reading the commands to identify and fetch the updated image data from the storage device; and display backplane circuitry for receiving the updated image data from the loader and for updating pixel driver circuity for pixels within the updated image data. The embodiments herein are ideal for driving micro-displays such as LCoS micro-LED displays.
SYSTEM, METHOD, AND APPARATUS FOR PULSE-WIDTH MODULATION SEQUENCE
Systems, methods, and apparatus for pulse-width modulation sequence. In some examples, a controller configured to produce a sequence segment having a first time duration by stretching a building block sequence having a second time duration by a stretch factor and instruct a light modulator to set pixel elements based on the sequence segment, wherein the light modulator comprises the pixel elements.
Consolidation of data compression using common sectored cache for graphics streams
A mechanism is described for facilitating consolidated compression/de-compression of graphics data streams of varying types at computing devices. A method of embodiments, as described herein, includes generating a common sector cache relating to a graphics processor. The method may further include performing a consolidated compression of multiple types of graphics data streams associated with the graphics processor using the common sector cache.
WIRELESS PROGRAMMABLE MEDIA PROCESSING SYSTEM
Embodiments of the subject matter described herein relate to a wireless programmable media processing system. In the media processing system, a processing unit in a computing device generates a frame to be displayed based on a graphics content for an application running on the computing device. The frame to be displayed is then divided into a plurality of block groups which are compressed. The plurality of compressed block groups are sent to a graphics display device over a wireless link. In this manner, both the generation and the compression of the frame to be displayed may be completed at the same processing unit in the computing device, which avoids data copying and simplifies processing operations. Thereby, the data processing speed and efficiency is improved significantly.
LIGHT FIELD VISION-BASED TESTING DEVICE, SYSTEM AND METHOD
Described are various embodiments of a light field vision-based testing device, system and method. One such device comprises an array of digital display pixels; a corresponding array of light field shaping elements (LFSEs); a hardware processor operable to adjust perception of a defined optotype within a range of visual acuity compensations; and an adjustable refractive optical system adjustable to selectively produce a complementary visual acuity compensation to extend each of a cylindrical compensation range and a spherical compensation range.
Adaptive multibit bus for energy optimization
Methods and apparatus relating to an adaptive multibit bus for energy optimization are described. In an embodiment, a 1-bit interconnect of a processor is caused to select between a plurality of operational modes. The plurality of operational modes comprises a first mode and a second mode. The first mode causes transmission of a single bit over the 1-bit interconnect at a first frequency and the second mode causes transmission of a plurality of bits over the 1-bit interconnect at a second frequency based at least in part on a determination that an operating voltage of the 1-bit interconnect is at a high voltage level and that the second frequency is lower than the first frequency. Other embodiments are also disclosed and claimed.