Conservative rasterization hardware comprises hardware logic arranged to perform an edge test calculation for each edge of a primitive and for two corners of each pixel in a microtile. The two corners that are used are selected based on the gradient of the edge and the edge test result for one corner is the inner coverage result and the edge test result for the other corner is the outer coverage result for the pixel. An overall outer coverage result for the pixel and the primitive is calculated by combining the outer coverage results for the pixel and each of the edges of the primitive in an AND gate. The overall inner coverage result for the pixel is calculated in a similar manner.

Conservative rasterization hardware comprises hardware logic arranged to perform an edge test calculation for each edge of a primitive and for two corners of each pixel in a microtile. The two corners that are used are selected based on the gradient of the edge and the edge test result for one corner is the inner coverage result and the edge test result for the other corner is the outer coverage result for the pixel. An overall outer coverage result for the pixel and the primitive is calculated by combining the outer coverage results for the pixel and each of the edges of the primitive in an AND gate. The overall inner coverage result for the pixel is calculated in a similar manner.

The present disclosure relates to a video wall. The video wall according to an embodiment of the present disclosure comprises: a plurality of displays; an image divider configured to divide an input image into a plurality of images; and at least one controller, wherein in response to a video being repeatedly played back, the at least one controller is configured to calculate an accumulated luminance value for each block on the plurality of displays during a first period when the video is repeatedly played back and calculate a luminance compensation value for each block based on the calculated accumulated luminance, and the plurality of displays display the video based on the luminance compensation value during a second period following the first period. Accordingly, an afterimage occurring due to the repeatedly played video may be reduced.

A technique for accessing accelerated processing device (“APD”) memory is provided. The technique includes identifying whether to activate one or both of a first direct mapping unit and a second direct mapping unit, wherein the first direct mapping unit is associated with a small address size and the second direct mapping unit is associated with a large address size; activating the identified one or both of the first direct mapping unit and the second direct mapping unit; and accessing memory of the accelerated processing device using the one or both of the first direct mapping unit and the second direct mapping unit.

A method of image processing, the method including performing linear processing of an input data signal encoded with a nonlinear function to generate a linear representation of the input data signal including linearized image data, and using an integrated circuit to generate a processed linear image by nonlinearly quantizing the linearized image data to generate nonlinear quantized data, generating a memory address based on the nonlinear quantized data, and accessing a lookup table based on the generated memory address.

Methods and apparatuses are disclosed herein for performing tone mapping and/or contrast enhancement. In some examples, a block mapping curve is low-pass filtered with block mapping curves of surrounding blocks to form a smoothed block mapping curve. In some examples, overlapped curve mapping of block mapping curves, including smoothed block mapping curves, is performed, including weighting, based on a pixel location, block mapping curves of a group of blocks to generate an interpolated block mapping curve and applying the interpolated block mapping curve to a pixel to perform ton mapping and/or contrast enhancement.

A display-driving apparatus for driving a display panel having at least two display areas is provided. The apparatus includes a storage device configured to receive and store a group of source data signals corresponding to a frame of image. The apparatus further includes a demultiplexer configured to split the group of source data signals into at least two sub-groups of data signals. Additionally, the apparatus includes a converter configured to convert a signal format of a respective one of the at least two sub-groups of data signals to a displayable format corresponding to the display panel. Furthermore, the apparatus includes a controller configured to transfer the at least two sub-groups of data signals in the displayable format to respective at least two display areas of the display panel to display a frame of image.

The present application relates generally to a parallel processing device. The parallel processing device can include a plurality of processing elements, a memory subsystem, and an interconnect system. The memory subsystem can include a plurality of memory slices, at least one of which is associated with one of the plurality of processing elements and comprises a plurality of random access memory (RAM) tiles, each tile having individual read and write ports. The interconnect system is configured to couple the plurality of processing elements and the memory subsystem. The interconnect system includes a local interconnect and a global interconnect.

The disclosure provides a light emitting device and a light emitting unit. The light emitting device includes a carrier, a first light emitting unit, and a second light emitting unit. The first light emitting unit is disposed on the carrier and has a first scan circuit, a first emit circuit, a first input terminal, and a first output terminal. The second light emitting unit is disposed on the carrier and has a second input terminal. The second input terminal is electrically connected to the first output terminal of the first light emitting unit. The first scan circuit is configured to provide a first scan signal to the first emit circuit and the second light emitting unit. The light emitting device and the light emitting unit of the disclosure may reduce the number of signal lines or have a circuit simplification effect.

An image projection apparatus as a first image projection apparatus configured to project an image includes a first input unit into which first image data is input, a second input unit into which second image data is input, and a generating unit configured to generate projection image data that includes a first image area corresponding to the first image data and a second image area corresponding to the second image data. The second image data is at least part of image data input to a second image projection apparatus different from the first image projection apparatus.