G11B20/14

In-circuit calibration method of anti-aliasing filter

A computer-implemented method, according to one embodiment, includes, for a particular data read clock value, generating a series of symmetrical square wave signals, each having a frequency that is a different fraction of the data read clock frequency. Anti-aliasing filtering is performed on each of the symmetrical square wave signals using predefined anti-aliasing settings. The filtered symmetrical square wave signals are passed through a band pass filter, the band pass filter being set to pass a single harmonic frequency of each of the symmetrical square wave signals. An amplitude of each of the band pass filtered symmetrical square wave signals is measured. In response to the amplitudes of the symmetrical square wave signals being within a predefined range, the anti-aliasing settings are stored. In response to the amplitudes of the symmetrical square wave signals being outside the predefined range, the anti-aliasing settings are changed, and the method is repeated.

Precompensation based on nearby data

A circuit may be configured to precompensate the storage of data on a storage device. The magnitude and polarity of the precompensated time adjustment can be determined by looking up data patterns of storage regions in a table. A boundary can include storage regions of the device used to determine the precompensation.

Precompensation based on nearby data

A circuit may be configured to precompensate the storage of data on a storage device. The magnitude and polarity of the precompensated time adjustment can be determined by looking up data patterns of storage regions in a table. A boundary can include storage regions of the device used to determine the precompensation.

RECORDING APPARATUS, RECORDING METHOD, REPRODUCTION APPARATUS, REPRODUCTION METHOD, RECORDING MEDIUM, ENCODING APPARATUS, AND DECODING APPARATUS
20210383835 · 2021-12-09 · ·

There is provided a recording apparatus, a recording method, a reproduction apparatus, a reproduction method, a recording medium, an encoding apparatus, and a decoding apparatus which enable recording or reproduction to be easily implemented at high line density. User data is encoded into a multilevel edge code, and a multilevel code whose value changes in accordance with the multilevel edge code is recorded. The multilevel edge code is generated through state transition of a code generation model which includes a state representing the number of times that zero is consecutive corresponding to a number of ways of the number of times that zero is consecutive, which is the number of times that an edge of 0 is consecutive among edges representing a change amount from an immediately preceding value of the multilevel code of an ML value which is equal to or greater than 3, and which transitions to a state representing the number of times that zero is consecutive including 0 in a case where 0 is output, and transitions to a state representing that the number of times that zero is consecutive is 0 times in a case where one of 1 to ML−1 is output.

Information recording device, information playback device, information recording medium and method for multi-values recording optical disc
11355149 · 2022-06-07 · ·

An information recording/playback device includes a recording pulse generation unit generates a recording pulse based on a multi-value modulation data, and a data recording unit records the mark on the recording medium based on the recording pulse. The data recording unit executes recording processing of setting sizes of all of marks to be recorded on the recording medium to a size equal to or smaller than a spot size at a half level of a maximum value of a two-dimensional light intensity distribution of a beam spot, and executes data recording processing of forming recording regions in modes having different densities of recording marks according to the levels of the multi-value modulation data.

Partial reverse concatenation for data storage devices using composite codes

In one embodiment, a system includes a processor, and logic integrated with the processor, executable by the processor, or integrated with and executable by the processor. The logic is configured to cause the processor to write, by the processor, data to a storage medium of a data storage system using a partial reverse concatenated modulation code. The partial reverse concatenated modulation code comprises encoding the data by applying a C2 encoding scheme prior to encoding the data by applying one or more modulation encoding schemes, followed by encoding the data by applying a C1 encoding scheme subsequent to the encoding of the data with the one or more modulation encoding schemes.

INFORMATION RECORDING DEVICE, INFORMATION PLAYBACK DEVICE, INFORMATION RECORDING MEDIUM, METHOD, AND PROGRAM
20210257000 · 2021-08-19 ·

In an information recording/playback device adopting multi-value recording, a configuration to limit the size of marks to be recorded on a recording medium only to a predetermined size equal to or smaller than a beam spot size to enable prevention and reduction of crosstalk and crosswrite is implemented. A recording pulse generation unit configured to generate a recording pulse based on a multi-value modulation data, and a data recording unit configured to record the mark on the recording medium on the basis of the recording pulse are included. The data recording unit executes recording processing of setting sizes of all of marks to be recorded on the recording medium to a size equal to or smaller than a spot size at a half (½) level of a maximum value (Pmax) of a two-dimensional light intensity distribution (power profile) of a beam spot, and executes data recording processing of forming recording regions in modes having different densities of recording marks according to the levels of the multi-value modulation data.

Decoding device and decoding method

Deterioration of convergence performance or operational stability due to an increase in constraint length is suppressed when coefficients are updated, so that decoding performance is improved. A decoding device according to the present technology includes an adaptive equalization unit that performs adaptive equalization, an adaptive maximum likelihood decoding unit that causes an identification point of maximum likelihood decoding to adaptively follow a characteristic of an input signal, a target waveform generation unit that, by convoluting a partial response coefficient into a decoded value, generates an equalization target waveform of the adaptive equalization which is performed by the adaptive equalization unit, an error signal generation unit that generates, as an equalization error signal, an error signal between the equalization target waveform and an equalized signal, and a coefficient updating unit that, through least-square-method computation for minimizing a correlation between the decoded value and the equalization error signal, updates the partial response coefficient which is used by the target waveform generation unit to generate the equalization target waveform.

Circuits and methods for modifying the write current waveform to improve track density in HDD

A preamplifier has a pre-compensation circuit that optimizes the write current in a low current range of less than 30 mA. The pre-compensation circuit maintains the peak current with a high overshoot current amplitude for achieving an optimized areal density capability to equalize the erase widths for the bit lengths of the encoded data with bit lengths greater than three clock time periods with encoded data with a bit length of the two clock time period. Alternately, the pre-compensation circuit has an overshoot generator that determines the optimum amplitude of the overshoot current for the bit-lengths for the encoded data. An overshoot data synchronizer is connected to a read current preamplifier to receive a pseudorandom read data signal that is applied to the overshoot generator to enable the different overshoot current amplitude depending on the bit length of the encoded data. The pre-compensated data current is transferred to the write head.

Constant-density writing for magnetic storage media
10971187 · 2021-04-06 · ·

The present disclosure describes aspects of constant-density writing for magnetic storage media. In some aspects, a constant-density writer delays transitions between bits within write data to enable constant-density writing. The write data has an initial bit period based on a constant clock signal, which is generated based on the rotation of a media disk. The constant-density writer modifies the write data to generate phase-delayed write data, which has a bit period that is greater than or equal to the initial bit period. To realize this bit period, the constant-density writer changes write phases of bit transitions within the write data. The constant-density writer can also insert stretch bits, filter single-bit transitions, and mitigate glitches within the phase-delayed write data.