A gate driving circuit and a display panel are provided. A gate driving unit in the gate driving circuit includes a pull-up control module, a pull-up node, a pull-down control module, a pull-down node, and a pull-down module. The pull-up control module is electrically connected to the pull-up node. The pull-down control module is electrically connected to the pull-down node. The pull-down control module is electrically connected to a scanning signal input terminal of a previous one stage gate driving unit or a scanning signal input terminal of a previous two stage gate driving unit. The pull-down module is electrically connected to the pull-up node and the pull-down node.

A shift register unit, a display driving circuit, a display panel, and a control method. The shift register unit includes: an input circuit configured to provide signals of an input signal terminal (IN) and a power signal terminal (VGH) to first and second pull-up nodes (Q1, Q2); a first control circuit configured to control potentials of the first pull-down node (QB1), and the first pull-up node (Q1); a second control circuit configured to control potentials of the second pull-up node (Q2) and the second pull-down node (QB2) based on the first pull-up node (Q1) and the first pull-down node (QB1); and an output circuit configured to provide the signal of one of the power signal terminal (VGH) and the reference signal terminal (VGL) to an output signal terminal (OUT) under control of the second pull-up node (Q2) and the second pull-down node (QB2).

A scan line to which a selection signal or a non-selection signal is input from its end, and a transistor in which a clock signal is input to a gate, the non-selection signal is input to a source, and a drain is connected to the scan line are provided. A signal input to the end of the scan line is switched from the selection signal to the non-selection signal at the same or substantially the same time as the transistor is turned on. The non-selection signal is input not only from one end but also from both ends of the scan line. This makes it possible to inhibit the potentials of portions in the scan line from being changed at different times.

A shiftable memory supporting atomic operation employs built-in shifting capability to shift a contiguous subset of data from a first location to a second location within memory during an atomic operation. The shiftable memory includes the memory to store data. The memory has the built-in shifting capability. The shiftable memory further includes an atomic primitive defined on the memory to operate on the contiguous subset.

A shift register group includes a plurality of series-coupled shift registers each being configured to provide an output signal. The third control signal of a first sift register of the plurality of shift registers is the output signal provided by the shift register N stages after the first shift register, and the fourth control signal of the first sift register is the voltage at the driving node of the shift register 2N stages after the first shift register, wherein N is a natural number. A driving method of the aforementioned shift register group is also provided.

A gate driving unit includes first to nth stages sequentially outputting first to nth gate pulses, respectively, according to a start signal, wherein n is an integer larger than 2; and a dummy stage receiving the nth gate pulse, charging an (n+1)th Q node and outputting a dummy pulse synchronized with a clock signal, the dummy stage receiving a reset signal and discharging the (n+1)th Q node, wherein the first to nth stages receive the reset signal and charge first QB to nth QB nodes, respectively.

A display device including: a display panel including a gate line and a data line; and a shift register including a stage for driving the gate line. The stage may include a first driving unit in a display area of the display panel and a second driving unit in a non-display area of the display panel.

Disclosed a display device and a method of driving the same. Each of sub-pixels in the display device includes: a light-emitting element; a driving element; a first switch element; a second switch element; a third switch element; and a fourth switch element. A gate signal includes: a first-first scan signal applied to a gate electrode of the fourth switch element, a first-second scan signal applied to a gate electrode of the third switch element, a second scan signal applied to a gate electrode of the second switch element, and an emission control signal applied to a gate electrode of the first switch element. A pulse of the first-first scan signal has the same pulse width as a pulse of the first-second scan signal and precedes the pulse of the first-second scan signal.

The present disclosure provides a shift register unit including a pull-up module, an input module, a reset module, a first pull-down module, a second pull-down module, a first control module, a second control module, a first state clearing module, and a second state clearing module. The shift register unit utilizes a first clock signal and a second clock signal to cause the first and second pull-down modules to pull down alternately, in order to maintain the stability of the output signal. Furthermore, each of the TFTs in the circuit structure has a duty cycle smaller than 50%, so that the lifetime of TFTs is greatly increased. The present disclosure further provides a gate driving device and a display device using the shift register unit.

A shift register, a stage-shift gate driving circuit and a display panel are provided. The shift register includes a down-delivering module, an output module, a first pull-down maintaining module, a second pull-down maintaining module, a first pull-down module and a second pull-down module. The down-delivering module is for receiving a stage-shift signal(s) from a preceding-stage shift register. The output module is for outputting stage-shift signals and a scan signal. The first pull-down maintaining module, the second pull-down maintaining module, the first pull-down module and the second pull-down module are for keeping the output signal of the output module to be a low voltage level after the output module outputs the scan signal. By the above solution, the invention can reduce the size of transistor, prevent the deterioration of transistor and increase the circuit output capability.