Patent classifications
G11C2216/28
APPARATUS WITH MULTI-BIT CELL READ MECHANISM AND METHODS FOR OPERATING THE SAME
Methods, apparatuses and systems related to reading data from memory cells configured to store more than one bit are described. The apparatus may be configured to determine a polarity data associated with reading data stored at a target location. In reading the data stored at the target location, the apparatus may apply one or more voltage levels across different polarities according to the determined polarity data.
Memories and operation methods thereof, memory systems and electronic devices
Examples of the present disclosure provide a memory and an operation method thereof, a memory system and an electronic device. The operation method comprises: applying a pass voltage to word lines coupled to unselected memory cells of one of memory strings according to a program order of a selected memory cell of the memory string when performing a read operation on the selected memory cell, wherein the earlier the program order of the selected memory cell is, the greater the pass voltage applied to the word lines coupled to the unselected memory cells of the memory string during the read operation is. In the examples of the present disclosure, the pass voltage applied to the word lines coupled to the unselected memory cells is determined according to the program order of the selected memory cell, i.e., according to different degrees of impact of a background pattern dependency effect experienced by the selected memory cell, such that the impact of the background pattern dependency effect can be decreased, and the read disturb is reduced.