Patent classifications
G01R31/2603
METHOD AND DEVICE FOR MEASURING SEMICONDUCTOR MULTILAYER STRUCTURE BASED ON SECOND HARMONIC
A measuring method and device based on the second harmonic for the whole area measurement of a wafer comprises three modes: a fixed-point measurement, a scanning measurement, and a combination of the fixed-point measurement and the scanning measurement. The scanning measurement solution measures the entire wafer under the premise of ensuring high measurement efficiency, obtain the position, size and relative density distribution of electrical defects, and achieve locating and checking of abnormal points on the wafer. A new formula system is provided for describing the second harmonic signal, so that the actual measurement results and the theoretical model are unified under the three modes of the fixed-point measurement, the scanning measurement, and the combination of fixed-point measurement and scanning measurement, so that the second harmonic metrology technology is no longer only a qualitative analysis method, but also a quantitative analysis method.
DE-SKEW METHOD FOR DYNAMIC TESTING USING TRANSFER FUNCTION OF CURRENT SENSOR
A dynamic test method includes configuring a dynamic test set-up for a device under test (DUT), the dynamic test set-up including at least one de-skewed voltage probe and at least one de-skewed current measurement cable connected to respective channels of an oscilloscope, and a current sensor connected to the de-skewed current measurement cable and configured to measure a current of the DUT. The method further includes conducting a dynamic test set-up for the DUT using the dynamic test set-up to obtain a current waveform for display on the oscilloscope, and applying a transfer function of the current sensor to the current waveform to display a corresponding de-embedded current waveform on the oscilloscope.
A WEDGE AMPLITUDE-MODULATION PROBE CARD AND A MAIN BODY THEREOF
A wedge amplitude-modulation probe card and a main body thereof. The probe card includes a probe card main body, upper wedge plates and lower wedge plates. Several upper wedge plates and several lower wedge plates are slidably arranged inside the probe card main body, and the several upper wedge plates and the several lower wedge plates are sequentially arranged at intervals in a staggered manner, so that by means of inserting different numbers of upper wedge plates between the lower wedge plates, probes on the upper wedge plates can be inserted into or shifted out of a probe queue thereunder, so as to increase or decrease the number of probes for testing, and thus, the testing amplitude of a single probe card can be adjusted, such that the probe card has universality.
METHOD AND APPARATUS FOR DETERMINING OUTPUT CHARGE OF WIDE BANDGAP DEVICES WITHOUT HARDWARE MODIFICATION
A test and measurement instrument includes a user interface, one or more probes to connect to a device under test (DUT), and one or more processors to take measurements during application of a double pulse test to the DUT to create measurement data, identify a measurement start point, find a measurement stop point, use the measurement data between the measurement start point and the measurement stop point to determine an output charge, Qoss, of the DUT, and display the output charge to a user. A method of determining output charge of a device under test (DUT) includes taking measurements during application of a double pulse test to create measurement data, identifying a measurement start point, finding a measurement stop point, using the measurement data between the measurement start point and the measurement stop point to determine an output charge, Qoss, of the DUT, and displaying the output charge.
Switching matrix system and operating method thereof for semiconductor characteristic measurement
The present disclosure provides a switching matrix system and an operating method thereof for semiconductor characteristic measurement. The switching matrix system is configured to: detect an assembly of at least one switching matrix module inserted into a plurality of slots of the switching matrix system; determine a user interface according to the assembly of the at least one switching matrix module inserted into the slots, wherein the user interface includes an operable object corresponding to the assembly; and provide the user interface.
TESTING APPARATUS AND TESTING METHOD
A testing apparatus, including: a variable resistor coupled to a control electrode of a switching device; a storage circuit storing information indicating a relation between a resistance value of the variable resistor and a voltage change rate at which a voltage between power-source-side and ground-side electrodes of the switching device changes when the switching device is turned off; and a control circuit controlling the variable resistor. The control circuit sets the variable resistor to have a first resistance value and obtains a first value of the voltage change rate, sets the variable resistor to have a second resistance value based on the first value of the voltage change rate and the information, obtains a second value of the voltage change rate when the variable resistor is of the second resistance value, and determines whether the second value of the voltage change rate meets a specification of the switching device.
Method for measuring current-voltage characteristic
A method for measuring a current-voltage characteristic (Id-Vds characteristic) representing the relationship between the drain current Id (or collector current) and the drain-source voltage Vds (or collector-emitter voltage) of a transistor M1 includes setting the drain current Id (or collector current) and the drain-source voltage Vds (or collector-emitter voltage), measuring the gate-source voltage Vgs (or gate-emitter voltage) and the gate current Ig of the transistor M1 in a switching transient state, and acquiring the current-voltage characteristic (Id-Vds characteristic) of the transistor M1 based on the measurement results of the gate-source voltage Vgs (or gate-emitter voltage) and the gate current Ig.
Dynamic Response Analysis Prober Device
The present invention relates to a prober device that shapes an input waveform of a dynamic electric signal to be input to one of probes, and observes an output waveform of the dynamic electric signal output through a sample, or preferably shapes the input waveform such that the output waveform of the dynamic electric signal output through the sample becomes approximately a pulse shape, when a response analysis of a dynamic signal is performed with respect to a fine-Structured device. With this, the response analysis of a high-speed dynamic signal equal to or greater than a megahertz level can be performed with respect to the fine-Structured device such as a minute transistor configuring an LSI.
METHOD FOR MEASURING CURRENT-VOLTAGE CHARACTERISTIC
A method for measuring a current-voltage characteristic (Id-Vds characteristic) representing the relationship between the drain current Id (or collector current) and the drain-source voltage Vds (or collector-emitter voltage) of a transistor M1 includes setting the drain current Id (or collector current) and the drain-source voltage Vds (or collector-emitter voltage), measuring the gate-source voltage Vgs (or gate-emitter voltage) and the gate current Ig of the transistor M1 in a switching transient state, and acquiring the current-voltage characteristic (Id-Vds characteristic) of the transistor M1 based on the measurement results of the gate-source voltage Vgs (or gate-emitter voltage) and the gate current Ig.
METHOD FOR MEASURING CURRENT-VOLTAGE CHARACTERISTIC
A method for measuring a current-voltage characteristic (Id?Vds characteristic) representing the relationship between the drain current Id (or collector current) and the drain-source voltage Vds (or collector-emitter voltage) of a transistor M1 includes setting the drain current Id (or collector current) and the drain-source voltage Vds (or collector-emitter voltage), measuring the gate-source voltage Vgs (or gate-emitter voltage) and the gate current Ig of the transistor M1 in a switching transient state, and acquiring the current-voltage characteristic (Id?Vds characteristic) of the transistor M1 based on the measurement results of the gate-source voltage Vgs (or gate-emitter voltage) and the gate current Ig.