Provided is a testing method for testing a semiconductor device provided with a main element portion including a main transistor portion and a main diode portion, and a sensing transistor portion for current detection, the testing method having: operating an element by causing a diode operation of the sensing transistor portion in the semiconductor device in a chip or wafer state; measuring the element by measuring a voltage-current characteristic showing a relationship between a voltage between main terminals of the sensing transistor portion and a current flowing through the main terminals during the diode operation; and determining the element by determining a defectiveness of the semiconductor device based on the voltage-current characteristic.

Provided is a test method of a semiconductor apparatus comprising: first testing the semiconductor apparatus by bringing one or more probe pins into contact with a pad of the semiconductor apparatus; and second testing the semiconductor apparatus in a state where contact positions of the one or more probe pins with respect to the pad are different from those of the first testing. In the first testing, the one or more probe pins may be brought into contact with first positions and second positions on the pad, and in the second testing, the one or more probe pins may be brought into contact between the first positions and the second positions on the pad.

The present application relates to the technical field of electronic circuits, and provides a gate detection circuit of an insulated gate bipolar transistor. The pulse shaping circuit is configured for shaping an input signal of a signal input device, and outputting a first square wave signal of a high level and a second square wave signal of a low level when the input signal is at the high level; and outputting a first square wave signal of the low level and a second square wave signal of the high level when the input signal is at the low level; the comparison circuit is configured for: comparing a first preset voltage with a voltage of a gate of the insulated gate bipolar transistor when the first square wave signal is at the high level, and outputting a low level when the first preset voltage is greater than the voltage of the gate of the insulated gate bipolar transistor; and comparing a second preset voltage with a voltage of a gate of the insulated gate bipolar transistor when the second square wave signal is at the high level, and outputting a low level when the second preset voltage is lower than the voltage of the gate of the insulated gate bipolar transistor; and the fault output circuit is configured for outputting a gate fault signal when the comparison circuit outputs the low level. The present application can detect the gate fault of the insulated gate bipolar transistor.

Provided is a test method of a semiconductor device under test, the test method comprising: controlling the semiconductor device under test to an on state by inputting a control signal to the semiconductor device under test; and observing the semiconductor device under test at a time of controlling the semiconductor device under test in the on state to an off state and evaluating the semiconductor device under test, wherein the semiconductor device under test includes one semiconductor device under test or a plurality of semiconductor devices under test, and in the controlling to the on state, a length of an on-time for which the one semiconductor device under test or the plurality of semiconductor devices under test are set to the on state is adjusted based on a magnitude of a variation in a delay time of the control signal.

First conductive layer is connected to an impurity region which is a source region or an emitter region. A first conductive layer having an emitter pad and a second conductive layer having a Kelvin emitter pad and a relay pad are separated. A plane occupied area of the Kelvin emitter pad is smaller than a plane occupied area of the emitter pad.

A state estimation system for a power conversion semiconductor apparatus in an embodiment includes an analysis processing unit and an estimation processing unit. The analysis processing unit projects points indicating a combination of a voltage detection value in first time history data of a voltage between the pair of main terminals detected when the pair of main terminals are forward-biased and when the pair of main terminals are reverse-biased and a current detection value in second time history data of detection values of both a forward current and a reverse current between the pair of main terminals onto a coordinate plane including a voltage axis and a current axis on the basis of the first time history data and the second time history data in the power conversion semiconductor apparatus including the pair of main terminals and derives a distribution of the projected points on the coordinate plane. An estimation processing unit estimates a state of the power conversion semiconductor apparatus on the basis of a distribution of the projected points.

Systems, methods, computer-readable media, techniques, and methodologies are disclosed for performing fault detection and prediction for power electronics and switching devices for power electronics. Systems and methods can determine, using a machine learning model, a prediction for a value of a first switching parameter of a switching device, the prediction based on the present value of a second switching parameter of a switching device and a prior value of the first switching parameter. Systems and methods disclosed herein can further determine a residual comprising the difference between the prediction and an actual value of the switching parameter, generate a test statistic based on the residual, and compare the test statistic to a first threshold value. Systems and methods disclosed herein can determine the presence of a fault in the switching device based on a comparison of the test statistic to a threshold value.

An optically-monitored and/or optically-controlled electronic device is described. The device includes at least one of a semiconductor transistor or a semiconductor diode. An optical detector is configured to detect light emitted by the at least one of the semiconductor transistor or the semiconductor diode during operation. A signal processor is configured to communicate with the optical detector to receive information regarding the light detected. The signal processor is further configured to provide information concerning at least one of an electrical current flowing in, a temperature of, or a condition of the at least one of the semiconductor transistor or the semiconductor diode during operation.

A method and a system for diagnosing an open circuit (OC) fault of an insulated gate bipolar transistor (IGBT) of a T-type three-level (T.sup.23L) inverter under multiple power factors based on instantaneous current distortion are provided. Similar characteristics of current distortion may be caused by an OC fault of a T.sup.23L inverter, making it is difficult to locate the fault. The method for diagnosing an OC fault of a grid-connected T.sup.23L inverter, can diagnose the OC fault hierarchically; four switch transistors in a phase can be divided into two groups according to the similarity analysis of current distortion under different power factors; group-based fault diagnosis is realized by half cycles in which a zero domain occurs; and then, a specific switching signal is injected to realize equipment-based OC fault diagnosis. The OC fault diagnosis of a T.sup.23L inverter is realized without additional hardware circuits.

An optically-monitored and/or optically-controlled electronic device is described. The device includes at least one of a semiconductor transistor or a semiconductor diode. An optical detector is configured to detect light emitted by the at least one of the semiconductor transistor or the semiconductor diode during operation. A signal processor is configured to communicate with the optical detector to receive information regarding the light detected. The signal processor is further configured to provide information concerning at least one of an electrical current flowing in, a temperature of, or a condition of the at least one of the semiconductor transistor or the semiconductor diode during operation.