G01R31/2608

Power semiconductor device with integrated current measurement

A package-integrated power semiconductor device is provided, which includes at least one power transistor coupled to a current path, a current measurement device and a package. The current measurement device is electrically insulated from and magnetically coupled to the current path. The current path and the current measurement device are arranged so as to enable the current measurement device to sense the magnetic field of a current flowing through the current path. The at least one power transistor, the current measurement device, and the current path are arranged inside the package. Further, a power module assembly including the package-integrated power semiconductor device as well as a method of operating the package-integrated power semiconductor device are provided.

RELIABILITY EVALUATION METHOD AND SYSTEM OF MICROGRID INVERTER IGBT BASED ON SEGMENTED LSTM
20220120807 · 2022-04-21 · ·

A reliability evaluation method and system for a microgrid inverter IGBT based on segmented long short-term memory (LSTM) is disclosed, including steps as follows. An electrothermal coupling model is constructed to obtain real-time junction temperature data. The original LSTM algorithm is improved to obtain a segmented LSTM prediction network for the aging characteristics of the IGBT. The monitoring value of the IGBT aging parameter is used to perform segmented LSTM prediction to obtain the predicted aging process, and the threshold values of different aging stages are categorized. An aging correction is performed on the aging parameter of the electrothermal coupling model to ensure the accuracy of the junction temperature data. Rainflow-counting algorithm is used to calculate real-time thermal stress load distribution of the IGBT. The fatigue damage theory and the Lesit life prediction model are combined to calculate the real-time cumulative damage and predicted life of the IGBT.

SEMICONDUCTOR DEVICES COMPRISING FAILURE DETECTORS FOR DETECTING FAILURE OF BIPOLAR JUNCTION TRANSISTORS AND METHODS FOR DETECTING FAILURE OF THE BIPOLAR JUNCTION TRANSISTORS
20230296661 · 2023-09-21 ·

A semiconductor device may include a voltage generator configured to generate a first base-emitter voltage of a first bipolar junction transistor, and a failure detector configured to generate a failure signal by comparing the first base-emitter voltage with an upper limit reference voltage and a lower limit reference voltage. The failure detector may include a second bipolar junction transistor a current source configured to generate a bias current, a first resistor coupled between the current source and a emitter of the second bipolar junction transistor to generate the upper limit reference voltage, a second resistor and a third resistor configured to divide a second base-emitter voltage of the second bipolar junction transistor to generate the lower limit reference voltage, and a first and second comparator configured to compare the first base-emitter voltage with the upper limit reference voltage and the lower limit reference voltage, respectively, to generate respective failure signals.

IGBT MODULE RELIABILITY EVALUATION METHOD AND DEVICE BASED ON BONDING WIRE DEGRADATION
20220003807 · 2022-01-06 · ·

The disclosure discloses an IGBT module reliability evaluation method and device based on bonding wire degradation, which belong to the field of IGBT reliability evaluation. The realization of the method includes: obtaining a relationship between a IGBT chip conduction voltage drop U.sub.ces and an operating current I.sub.c along with a chip junction temperature T.sub.c; for an IGBT module under test, obtaining the conduction voltage drop U.sub.ces-c of the IGBT chip through the operating current I.sub.c and the chip junction temperature T.sub.c; obtaining an external conduction voltage drop U.sub.ces-m of the IGBT module by using a voltmeter; performing subtraction to obtain a voltage drop at a junction of a IGBT chip and a bonding wire, and combining the operating current to obtain a resistance at the junction; determining that the IGBT module has failed when the resistance at the junction increases to 5% of an equivalent impedance of the IGBT module.

Diagnostic device and method to establish degradation state of electrical connection in power semiconductor device

A method to establish a degradation state of electrical connections in a power semiconductor device comprising: measuring at least two voltage drop values under two respective current values for the same temperature value. The two current values are strictly different or the measurements are made under two distinct gate levels of a transistor; saving the measured values as calibration data; monitoring operational conditions of said power semiconductor device; measuring at least two voltage drop values under respective same current values as preceding, and at two respective moments during which the monitored operational conditions corresponding to two respective predefined sets of criteria related to states of operation and to a common temperature; saving the at least two values as operational data; calculating a numerical index in a manner to estimate a degradation state of said power semiconductor device.

Method and system for online monitoring of health status of insulated-gate bipolar transistor module

A method and a system for online monitoring of a health status of an insulated-gate bipolar transistor (IGBT) module are provided, which belong to the field of IGBT status monitoring. In order to overcome the inability to real-time monitor health statuses of existing IGBT modules, the method of the disclosure includes the following steps. A current sensor is used to measure a collector current of each IGBT module. A collected current value is substituted into a simulation model to obtain a current imbalance rate. A failure module is located according to the current imbalance rate and temperature to achieve the objective of monitoring an IGBT health status.

Device analysis apparatus and device analysis method

A device analysis apparatus is a device analysis apparatus for determining a quality of a power semiconductor device, including an application unit that applies a voltage signal to the power semiconductor device, a light detection unit that detects light from the power semiconductor device at a plurality of detection positions and outputs detection signals based on detection results, and a determination unit that determines the quality of the power semiconductor device based on temporal changes of the detection signals.

METHOD AND APPARATUS FOR DETECTING AGING-DICTATED DAMAGE OR DELAMINATION ON COMPONENTS, IN PARTICULAR POWER MODULES OF POWER ELECTRONIC DEVICES, AND POWER ELECTRONIC DEVICE, IN PARTICULAR CONVERTER
20220260647 · 2022-08-18 ·

To facilitate a reliable detection of age-related damage or delamination on components the following is proposed: [i] within the scope of radiofrequency reflectometry, scanning a component by radiofrequency signal irradiation in the micrometer or millimeter wavelength range and by measuring at least one reflection signal, which was reflected at the component, in punctiform, one-dimensional or two-dimensional fashion for the purposes of generating at least one first radiofrequency image representation; [ii] scanning the component in direct time offset fashion with respect to the radiofrequency signal irradiation by a combination of ultrasonic signal irradiation and the radiofrequency signal irradiation in the micrometer or millimeter wavelength range and by measuring at least one further reflection signal, which was reflected at the component; and [iii] comparing the radiofrequency image representations generated based on the reflection signals, wherein determined changes in the radiofrequency image representations indicate damage or delamination on the component.

Device and method for monitoring multi-die power module
11415625 · 2022-08-16 · ·

A method and device for monitoring a multi-die power module in a half-bridge switch configuration are provided. The method and device are designed to set dies in a non conductive state, select one die which is blocking a voltage, inject a current in a gate of the selected die in order to charge an input parasitic capacitance of the selected die, monitor a voltage that is representative of a voltage on the gate of the selected die, and memorize the value of the monitored voltage when the value of the monitored voltage is stabilized.

IGBT module reliability evaluation method and device based on bonding wire degradation
11378613 · 2022-07-05 · ·

The disclosure discloses an IGBT module reliability evaluation method and device based on bonding wire degradation, which belong to the field of IGBT reliability evaluation. The realization of the method includes: obtaining a relationship between a IGBT chip conduction voltage drop U.sub.ces and an operating current I.sub.c along with a chip junction temperature T.sub.c; for an IGBT module under test, obtaining the conduction voltage drop U.sub.ces-c of the IGBT chip through the operating current I.sub.c and the chip junction temperature T.sub.c; obtaining an external conduction voltage drop U.sub.ces-m of the IGBT module by using a voltmeter; performing subtraction to obtain a voltage drop at a junction of a IGBT chip and a bonding wire, and combining the operating current to obtain a resistance at the junction; determining that the IGBT module has failed when the resistance at the junction increases to 5% of an equivalent impedance of the IGBT module.