Patent classifications
G01R31/2886
TEST SOCKET CONNECTOR HAVING LATCH WITH A BOTTOM GUIDING PORTION
An electrical connector includes: a base and a contact module received by the base; a cover movably disposed relative to the base; and a latch mechanism including a pair of latches pivotably disposed relative to the cover and rotatably disposed relative to the base, wherein each of the pair of latches has an upper guiding portion and the base has a corresponding portion for engaging the upper guiding portion.
BURN-IN BOARD AND BURN-IN APPARATUS
A burn-in board includes: a board; a socket mounted on the board; a connector attached to the board; a wiring system that is disposed in the board and that connects the socket and the connector; and a compensation circuit that connects to the wiring system and that compensates a frequency characteristic of a signal transmitted through the wiring system.
ELECTRONIC DEVICE INSPECTION APPARATUS
An electronic device inspection apparatus of the present application comprises an inspection table for positioning and holding an electrode disposed on a semiconductor device , a contact element that is formed of a shape memory alloy in a long and thin plate shape and has a base part fixed to the inspection table and a variable part formed in a shape of a spiral at a first temperature and being developed from the spiral at a second temperature; and a measurement circuitry for measuring the semiconductor device by conducting a current to flow into the electrode via the contact element. The axis of the spiral of the variable part is parallel to the electrode face of the positioned electrode and a contact region is formed along a longitudinal direction between the variable part and the positioned electrode at the second temperature.
CHIP SOCKET, TESTING FIXTURE AND CHIP TESTING METHOD THEREOF
The present application discloses a chip socket, a testing fixture and a chip testing method thereof. The chip socket includes a pedestal, a plurality of conductive traces, a plurality of clamp structures, and a plurality of electrical contacts. The plurality of conductive traces are formed in the pedestal. The plurality of clamp structures are conductive and disposed on the first surface of the pedestal, and at least one of the plurality of clamp structures is coupled to a corresponding conductive trace and configured to clamp a solder ball of a chip to be tested. The plurality of electrical contacts are disposed on the second surface of the pedestal, and at least one of the plurality of electrical contacts is coupled to a corresponding clamp structure through a corresponding conductive trace.
Metal probe structure and method for fabricating the same
A metal probe structure and a method for fabricating the same are provided. The metal probe structure includes a multi-layer substrate, a first flexible dielectric layer, a second flexible dielectric layer, and a plurality of first metal components. The first flexible dielectric layer is disposed over the multi-layer substrate and has a conductive layer formed thereover. The second flexible dielectric layer is disposed over the first flexible dielectric layer to cover the conductive layer. The plurality of first metal components is disposed over the conductive layer and partially in the second flexible dielectric layer to serve as a metal probe.
Test system and probe device
A test system of embodiments electrically connects one or more first semiconductor chips formed on a first wafer and one or more second semiconductor chips formed on a second wafer to perform tests on the one or more first and second semiconductor chips. The test system includes a test device that supplies a test signal to each of the one or more first semiconductor chips, a first probe device including a first probe to be connected to a first internal pad of each of the one or more first semiconductor chips and a first communication circuit configured to transmit and receive a signal, and a second probe device including a second probe to be connected to a second internal pad of each of the one or more second semiconductor chips and a second communication circuit configured to transmit and receive the signal to and from the first communication circuit.
TEST APPARATUS AND JUMPER THEREOF
The present disclosure provides a test apparatus and a jumper thereof. The test apparatus includes a base board and the jumper. The base board has a first slot and a second slot. The first slot has a plurality of electrical contacts, and is configured to receive a plurality of pins of a device under test. The jumper is inserted into the second slot. The jumper includes a body and a plurality of first circuits. The first circuits are disposed on the body and electrically connect the electrical contacts of the first slot to a plurality of pins of a tester.
PROBE ASSEMBLY WITH TWO SPACED PROBES FOR HIGH FREQUENCY CIRCUIT BOARD TEST APPARATUS
The probe assembly operates with a circuit board test apparatus and includes a main test probe and a secondary test probes. The probe assembly is capable of moving in X, Y and Z directions relative to a circuit board being tested (UUT). The two test probes are movable linearly relative to each other and rotatable together so as to accurately locate the two probes on selected pins on the UUT, for receiving signals from the selected pins. The received signals are transmitted to a display apparatus.
INSPECTION APPARATUS AND INSPECTION METHOD
An inspection apparatus for a substrate, comprising: a placing member on which a substrate is placed; a holder configured to hold a probe card having probes; positioning members to be in contact with an upper surface of the placing member to define a height of the placing member with respect to the probes; an adjustment mechanism configured to adjust heights of the positioning members; a detection device; and a control. The controller is configured to execute: positioning the positioning member to a reference height at which an overdrive amount becomes zero, based on the detection results of the probes, the placing member, and the positioning member; and acquiring a height of the positioning member at which a desired overdrive amount is obtained, and raising the placing member while adjusting a driving amount of the adjustment mechanism until the placing member reaches the height.
TEST APPARATUS FOR SEMICONDUCTOR PACKAGE
An apparatus for testing a package-on-package type semiconductor package includes an upper test socket on which an upper package is mounted, the upper test socket being mounted on a pusher and connected to the lower package; a lower test socket mounted on a tester and connected to the lower package; and an adsorption pad coupled to the pusher and configured to adsorb and pressurize the lower package using a vacuum pressure, wherein the adsorption pad comprises a body part having a vacuum pressure passage formed therein; and an adsorption part having an adsorption hole corresponding to the vacuum pressure passage, and the body part is attached on a central portion of an upper surface of the adsorption part and an outer oil overflow-preventing part configured to trap silicon oil eluted from the body part is formed at an outer periphery the adsorption part.