Various particular embodiments include a via testing structure, including: a first terminal coupled to a first set of sensing lines in a top level of the structure; a second terminal coupled to a second set of sensing lines in the top level of the structure, wherein first set of sensing lines and the second set of sensing lines are disposed in a comb arrangement; a third terminal coupled to a third set of sensing lines in a bottom level of the structure; and a plurality of vias electrically coupling the second set of sensing lines in the top level of the structure to the third set of sensing lines in the bottom level of the structure, each via having a via top and a via bottom.

A test system can receive a test signal from a device under test (DUI) via a first signal path. A comparator circuit can receive the test signal and, in response, generate an intermediate output signal based on a magnitude relationship between the test signal a comparator reference signal. A compensation circuit can generate a correction signal that is complementary to a portion of the received test signal, such as to correct for loading effects of the first signal path. The test system can include an output circuit configured to provide a corrected differential output signal that is based on a combination of the intermediate output signal and the correction signal.

A probe head that contains a coining surface and a plurality of probe tips integrated on a same side of the probe head is provided. The probe head has a first portion and a laterally adjacent second portion, wherein the first portion of the probe head contains the coining surface, and the second portion of the probe head contains the plurality of the probe tips. Each probe tip may, in some embodiments, extend outwards from a probe pedestal that is in contact with the second portion of the probe head. The probe head is traversed across the surface of a semiconductor wafer containing a plurality of solder bump arrays such that the coining surface contacts a specific array of solder bumps prior to contacting of the same specific array of solder bumps with the probe tips.

Aspects of the present disclosure are directed to methods, apparatuses and systems involving a switched probe contact. According to an example embodiment, an apparatus includes logic circuitry, a first circuit to communicate signals with the logic circuitry, and a first bond pad connected to the first circuit via a first circuit path. The apparatus also includes a second circuit to communicate signals with the logic circuitry, and a second bond pad connected to the second circuit via a second circuit path. A probe contact is connected to the first bond pad and communicates signals with an external probe, and a switch circuit is connected to the probe contact and the second circuit path. The switch circuit communicates signals between the probe contact and the second circuit path by selectively connecting and disconnecting the probe contact to the second circuit path.

A method includes providing a test structure above a tester, wherein the test structure includes a load board including a first and second connectors, a first socket electrically connected to the first and second connectors of the load board, and a second socket electrically isolated from the first connector of the load board and electrically connected to the second connector of the load board. A first and second semiconductor dies are disposed respectively on the first and second sockets. A test signal to the first semiconductor die and the second semiconductor die through the second connector of the load board are simultaneously applied by using the tester. A first signal of the first semiconductor die through the first connector is read by using the tester. Whether the first semiconductor die is disturbed by the second semiconductor die is determined according to the first signal.

Provided is a testing method including: disposing a wafer on a working platform of a testing device; and moving a circuit board of the testing device relative to the working platform by a movement assembly of the testing device so as to allow at least two testing ports of the circuit board to test two chips of the wafer, respectively. Further, the two testing ports have different testing functions. Therefore, during the wafer testing process, a single testing device can perform multiple testing operations.

To manufacture a redistribution layer for an integrated circuit, a first insulating layer is formed on a conductive interconnection layer of a wafer. A conductive body is then formed in electrical contact with the interconnection layer. The conductive body is then covered with an insulating region having an aperture that exposes a surface of the conductive body. The surface of the conductive body and the insulating region are then covered with an insulating protection layer having a thickness less than 100 nm. This insulating protection layer is configured to provide a protection against oxidation and/or corrosion of the conductive body.

A probe tip structure that decreases the accumulation rate of Sn particles to the probe tip and enables considerably more efficient and complete laser cleaning is disclosed. In an embodiment, the probe structure includes an array of probe tips, each probe tip having an inner core; an interfacial layer bonded to the inner core; and an outer layer bonded to the interfacial layer, wherein the outer layer is resistant to adherence of the solder of the ball grid array package.

A contactor assembly for a testing system for testing integrated circuit devices includes a contact, and a housing having a contact slot. The contact is receivable in the contact slot. The contact includes a tip, a body, and a tail; and is configured to be in a free state, a preload state, and an actuated state. The housing includes a housing backstop. When the contact is in the preload state, a contact backstop of the contact is biased against the housing backstop.

A support assembly for a semiconductor processing chamber is provided and includes a body comprising a heater, and a puck coupled to the body, the puck comprising a chucking electrode embedded in a dielectric material, wherein, when a radio frequency power of about 13.56 megahertz is applied to a substrate receiving surface of the body, an electrical resistance (R) of the body is about 0.460 Ohms, or less, and an electrical reactance (X) of the body is about 10.9 Ohms, or greater.