Patent classifications
G01R31/31702
In-field Monitoring of On-Chip Thermal, Power Distribution Network, and Power Grid Reliability
Various embodiments may include methods and systems for monitoring characteristics of a system-on-a-chip. Various embodiments may include inputting, from a test data input connection, test data to a first scan chain section including a first group of logic gates located within a first region of the SoC. Various embodiments may include providing, from a first clock gate associated with the first region of the SoC, a clock signal to the first group of logic gates. Various embodiments may include measuring, using a first sensor, the characteristics at a second region of the SoC in response to providing the clock signal to the first group of logic gates. Embodiments may further include processing or analyzing measured characteristics to determine a testing result.
SYSTEMS AND METHODS FOR ON-CHIP NOISE MEASUREMENTS
Systems and methods for measuring noise in discrete regions of multi-layer superconducting fabrication stacks are described. Methods for measuring noise in spatial regions of a superconducting fabrication stacks may include the use of resonators, each having a different geometry. As many resonators as spatial regions are fabricated. Data collected from the resonators may be used to calculate fill fractions and spin densities for different spatial regions of the superconducting fabrication stack. The data may be collected via on-chip electron-spin resonance. The superconducting fabrications may be part of a fabrication stack for a superconducting processor, for example a quantum processor, and the spatial region studied may be proximate to qubit wiring layers.
Microelectromechanical systems sensor testing device, system and method
A microelectromechanical system (MEMS) sensor testing device, system and method are provided. The testing device includes a socket having a plurality of pads configured to receive a respective plurality of pins of the MEMS sensor, a body having a plurality of operable positions associated with a respective plurality of orientations of the MEMS sensor and circuitry which performs a method for testing the MEMS sensor in the plurality of operable positions. The method includes, for each position of the plurality of operable positions, outputting an indication of the position to the plurality of operable positions, receiving one or more measurements made by the MEMS sensor at the respective position and determining whether the one or more measurements satisfy a reliability criterion. The method includes generating a report based on the plurality of measurements and indicating whether the plurality of measurements satisfy a plurality of reliability criteria, respectively.
CALIBRATION METHOD, CALIBRATION APPARATUS, AND PROGRAM
A calibration method, a calibration apparatus, and a program capable of estimating a degree of signal loss of an input signal supplied to an oscillator are provided. The calibration method includes: outputting an input signal to be input to an oscillator to be calibrated that includes a resonator and performs parametric oscillation, from a signal generator connected to the resonator via a transmission path while sweeping a frequency or a power of this input signal; acquiring distribution data of an intensity of a reflection signal based on measurement of the intensity of the reflection signal from the oscillator in response to the input signal; and estimating a degree of signal loss by comparing the distribution data acquired by the measurement with the distribution data theoretically obtained in which a value of the degree of the signal loss of the transmission path is assumed.
CURRENT SENSOR AND METHOD FOR SENSING A STRENGTH OF AN ELECTRIC CURRENT
Examples relate to a current sensor and to a method for sensing a strength of an electric current using two groups of magnetic sensing probes. The current sensor includes a first group and a second group of magnetic sensing probes. The current sensor comprises sensor circuitry coupled to the first and the second group of magnetic sensing probes. The sensor circuitry is configured to determine a first differential magnetic field measurement of a magnetic field using probes of the first group of magnetic sensing probes. The sensor circuitry is configured to determine a second differential magnetic field measurement of the magnetic field using probes of the second group of magnetic sensing probes. The sensor circuitry is configured to determine a strength of the electric current based on a difference between the first differential magnetic field measurement and the second differential magnetic field measurement.
SYSTEMS FOR PROBING SUPERCONDUCTING CIRCUITS INCLUDING THE USE OF A NON-MAGNETIC CRYOGENIC HEATER
Systems for probing superconducting circuits, including using a non-magnetic cryogenic heater, are disclosed. A system including a circuit board having a socket and a heater, mounted on the socket, is provided. The heater includes a resistive element and an arrangement for connection with wires configured to supply a current to the resistive element, where the heater is non-magnetic. The system further includes an integrated circuit package, mounted on the socket, such that the heater is located between the socket and the package, where the integrated circuit comprises superconducting circuits having a first temperature corresponding to a superconducting transition temperature. The heater is configured to raise a temperature associated with the integrated circuit from a second temperature to the first temperature, where the second temperature is lower than the first temperature, and where each of the first temperature and the second temperature is a cryogenic temperature.
INJECTION DEVICE, SEMICONDUCTOR TESTING SYSTEM AND ITS TESTING METHOD
An injection device is disclosed herein. The injection device is utilized to inject a liquid onto a test area of a semiconductor element. The injection device includes a base, a reservoir, a first testing pipe, a cleaning pipe and a liquid-draining pipe. The reservoir set on the base is provided with at least one connecting port and a dropping port, wherein the dropping port is against the test area of the semiconductor element. The first testing pipe, the cleaning pipe and the liquid-draining pipe are connected to at least one connecting port, wherein a first liquid is injected from the first testing pipe into the reservoir, and wherein the a cleaning liquid is injected from the cleaning pipe into the reservoir to clean the reservoir and the test area. The dropping port is utilized to drain off the first testing liquid and the cleaning liquid in the reservoir. A semiconductor testing system utilizing the injection device and its testing method are also provided herein.
Single pin test interface for pin limited systems
An integrated circuit includes a supply terminal to receive a supply voltage and a test terminal that operates in an input mode and an output mode. A test interface of the integrated circuit operates in a normal mode requiring a serial write to the test terminal to access test locations in the integrated circuit. The test interface also operates in an automatic mode in which addresses for test locations are auto incremented by toggling the supply voltage from a high voltage level to a low voltage level and back to the high voltage level. In an input mode, with the supply voltage at the low voltage level, the test pin receives configuration and address information. In output mode, with the supply voltage at the high voltage level, the test pin supplies test information corresponding to the address information received.
EXTERNAL PORT MEASUREMENT OF QUBIT PORT RESPONSES
Systems, computer-implemented methods, and computer program products to facilitate external port measurement of qubit port responses are provided. According to an embodiment, a computer-implemented method can comprise terminating, by a system operatively coupled to a processor, one or more qubit ports with different electrical connections. The computer-implemented method can also comprise determining, by the system, one or more qubit port responses from external port responses based on the terminating. In some embodiments, the computer-implemented method can further comprise determining, by the system, a multiport admittance function corresponding to at least two of the one or more qubit ports.
Method for determining characteristic parameters of an oscillator
A method for determining characteristic parameters of an electrostatic actuation oscillator, where the method includes generating a first excitation voltage defined as being the sum of a first sinusoidal voltage and a voltage pulse; applying the first excitation voltage at the input of the oscillator; acquiring in the time domain a first response voltage present at the output of the oscillator when the first excitation voltage is applied at the input of the oscillator; obtaining, by transformation in the frequency domain, a first amplitude spectral density of the first response voltage; determining the characteristic parameters of the oscillator from the first amplitude spectral density.