Described herein are integrated circuit chips having test circuitry designed such that independently selectable testing of different power domains using a same scan chain compressor-decompressor circuit may be performed. Also disclosed herein are integrated circuit chips having test circuitry designed such that independently selectable testing of different power domains using multiple different scan chain compressor-decompressor circuits may be performed.

A test system is disclosed. The test system includes a tester, a first voltage stabilization circuit, and a device under test (DUT). The tester generates a first operational voltage and a control signal. The first voltage stabilization circuit transmits a second operational voltage, associated with the first operational voltage, to a socket board. The DUT operates with the second operational voltage received through the socket board. The first voltage stabilization circuit is further configured to control, according to the control signal, the second operational voltage to have a first voltage level when the DUT is operating.

Testing of die on wafer is achieved by; (1) providing a tester with the capability of externally communicating JTAG test signals using simultaneously bidirectional transceiver circuitry, (2) providing die on wafer with the capability of externally communicating JTAG test signals using simultaneously bidirectional transceiver circuity, and (3) providing a connectivity mechanism between the bidirectional transceiver circuitry's of the tester and a selected group or all of the die on wafer for communication of the JTAG signals.

A test arrangement for adjusting a setup of testing a device under test (DUT) includes a main device that generates an RF signal and processes an incoming RF signal in a first frequency range; a frontend component generates an RF signal and processes an incoming RF signal in a second frequency range. The frontend component measures a signal level in a sub-range within the first frequency range; a connection cable connects the main device with the frontend component; and an analyzer predicts a behavior of the connection cable in a rest portion of the first frequency range that is different from the sub-range within the first frequency range.

A module for initializing and calibrating a product during the manufacture of the product in a manufacturing environment, wherein the module is able to be arranged on the product and wherein the module has a first interface for wireless data transmission between the module and the manufacturing environment, a second interface for establishing a data connection between the module and the product, an electrical energy source and a data processing unitft. The module is designed to supply the product at least temporarily with energy by way of the energy source, to establish a data connection with the product via the second interface, to perform test and/or calibration routines on the product via the second interface, wherein the data processing unit generates test and/or calibration data during the performance of the test and/or calibration routines, and to transmit the test and/or calibration data to the manufacturing environment via the first interface.

A measurement device is described that comprises a measurement unit configured to perform measurements on an electric signal of a device under test while applying at least one measurement parameter for performing the measurements. The measurement device has an integrated direct current source configured to power the device under test. The measurement device also comprises a monitoring unit configured to monitor at least one monitoring parameter of the direct current source. The measurement device has a control unit configured to control the measurement parameter. Further, a method for measuring a device under test is described.

A circuit and a method for reducing interference of power on/off to hardware test. The circuit includes: a power unit, a voltage processing unit, a PSU and a to-be-tested hardware. An input terminal of the voltage processing unit is connected to the power unit, an output terminal of the voltage processing unit is connected to an input terminal of the PSU, and an output terminal of the PSU is connected to the to-be-tested hardware; the power unit is configured to provide an operating voltage; the voltage processing unit is configured to eliminate electric sparks caused by instability of the operating voltage at an instant of power on/off; the PSU is configured to convert a stable operating voltage outputted from the voltage processing unit into a direct current voltage required for the to-be-tested hardware; and the to-be-tested hardware is configured to receive the direct current voltage outputted from the PSU.

A reference clock signal of at least one module clock signal associated with each module is delivered. A measurement period is generated and a module whose consumption is to be determined is selected. The frequency of the at least one module clock signal associated with the selected module reduced during the measurement period. A measurement of a first consumption of the device is made in the measurement period. A measurement of a second consumption of the device is made outside the measurement period. The consumption of the selected module is determined from the first and measured first and second consumptions.

Described herein are integrated circuit chips having test circuitry designed such that independently selectable testing of different power domains using a same scan chain compressor-decompressor circuit may be performed. Also disclosed herein are integrated circuit chips having test circuitry designed such that independently selectable testing of different power domains using multiple different scan chain compressor-decompressor circuits may be performed.

An apparatus for testing a device under test (DUT) is provided. The apparatus includes a power supply device and a data generating device. The power supply device is configured to provide a first voltage and a second voltage to the DUT. The data generating device is configured to provide first data to the DUT. The power supply device is configured to provide the first voltage to the DUT in a first time duration. The data generating device is configured to provide the first data to the DUT in the first time duration. The power supply device is configured to provide the second voltage to the DUT in a second time duration after the first time duration. The second voltage is different from the first voltage.