A test device for a high-speed/high-frequency test. The test device includes: a conductive block which includes a probe hole; at least one signal probe which is supported in an inner wall of the probe hole without contact, includes a first end to be in contact with a testing contact point of the object to be tested, and is retractable in a lengthwise direction; and a coaxial cable which includes a core wire to be in electric contact with a second end of the signal probe. With this test device, the coaxial cable is in direct contact with the signal probe, thereby fully blocking out noise in a test circuit board.

A test device for a high-speed/high-frequency test. The test device includes: a conductive block which includes a probe hole; at least one signal probe which is supported in an inner wall of the probe hole without contact, includes a first end to be in contact with a testing contact point of the object to be tested, and is retractable in a lengthwise direction; and a coaxial cable which includes a core wire to be in electric contact with a second end of the signal probe. With this test device, the coaxial cable is in direct contact with the signal probe, thereby fully blocking out noise in a test circuit board.

A test device for a high-speed/high-frequency test. The test device includes: a conductive block which includes a probe hole; at least one signal probe which is supported in an inner wall of the probe hole without contact, includes a first end to be in contact with a testing contact point of the object to be tested, and is retractable in a lengthwise direction; and a coaxial cable which includes a core wire to be in electric contact with a second end of the signal probe. With this test device, the coaxial cable is in direct contact with the signal probe, thereby fully blocking out noise in a test circuit board.

A bonded structure is disclosed. The bonded structure can include a first semiconductor element having a first front side and a first back side opposite the first front side. The bonded structure can include a second semiconductor element having a second front side and a second back side opposite the second front side, the first front side of the first semiconductor element directly bonded to the second front side of the second semiconductor element along a bond interface without an adhesive. The bonded structure can include security circuitry extending across the bond interface, the security circuitry electrically connected to the first and second semiconductor elements.

A bonded structure is disclosed. The bonded structure can include a first semiconductor element having a first front side and a first back side opposite the first front side. The bonded structure can include a second semiconductor element having a second front side and a second back side opposite the second front side, the first front side of the first semiconductor element directly bonded to the second front side of the second semiconductor element along a bond interface without an adhesive. The bonded structure can include security circuitry extending across the bond interface, the security circuitry electrically connected to the first and second semiconductor elements.

A display device includes a first substrate including a display area and a non-display area, pixels disposed in the display area, a driver integrated circuit located in the non-display area and connected to the pixels through data lines, a first pad portion disposed in the non-display area, a second pad portion disposed in the non-display area and connected to the driver integrated circuit, a first thin film transistor connected to one of the data lines and adjusting a first data signal, a second thin film transistor connected to another of the data lines and adjusting the first data signal, a first wiring connecting the first thin film transistor and the first pad portion, a second wiring connecting the second thin film transistor and the second pad portion, and a gate signal line connected to the first and second thin film transistors.

A display device includes a first substrate including a display area and a non-display area, pixels disposed in the display area, a driver integrated circuit located in the non-display area and connected to the pixels through data lines, a first pad portion disposed in the non-display area, a second pad portion disposed in the non-display area and connected to the driver integrated circuit, a first thin film transistor connected to one of the data lines and adjusting a first data signal, a second thin film transistor connected to another of the data lines and adjusting the first data signal, a first wiring connecting the first thin film transistor and the first pad portion, a second wiring connecting the second thin film transistor and the second pad portion, and a gate signal line connected to the first and second thin film transistors.

Motherboard connector failures can be predicted. An embedded controller can be employed on the motherboard to monitor when devices are connected to and disconnected from the motherboard's connectors. The embedded controller can maintain an event log and connector information in which it counts the number of times a device is connected to/disconnected from a connector. The BIOS can leverage the event log and the connector information to notify an end user to take action to correct or prevent possible corrosion. Training records may also be employed to predict connector failure. The training records can track and maintain baseline and periodic device training attributes. When the periodic training attributes deviate from the baseline training attributes, an end user can be notified to take action to remove corrosion.

The present invention provides a method for detecting failed back-drills in PCBs in the process of fabricating a PCB so that the failed back-drill can be screened out or repaired. The present invention accomplishes this by adding a short to ground connection for every back-drill via that will be cut when the back-drill removes the via stub. If the back-drill is bad or failed the short to ground will fail the subsequent electrical tests. The PCB can be repaired by re-drilling the hole or via. The present invention allows for detecting failed back-drills with easy detection in the manufacturing stage using standard equipment and test procedures. This process creates a simple pass-fail measurement that uses an existing common test process to catch failed back drills in the PCB fabrication facility. This allows for easy and cost-effective repair and guarantees back-drill failures do not pass into the field.

The present invention provides a method for detecting failed back-drills in PCBs in the process of fabricating a PCB so that the failed back-drill can be screened out or repaired. The present invention accomplishes this by adding a short to ground connection for every back-drill via that will be cut when the back-drill removes the via stub. If the back-drill is bad or failed the short to ground will fail the subsequent electrical tests. The PCB can be repaired by re-drilling the hole or via. The present invention allows for detecting failed back-drills with easy detection in the manufacturing stage using standard equipment and test procedures. This process creates a simple pass-fail measurement that uses an existing common test process to catch failed back drills in the PCB fabrication facility. This allows for easy and cost-effective repair and guarantees back-drill failures do not pass into the field.