The present invention provides a transfer film in which a pattern appearance defect is unlikely to occur, a manufacturing method for a laminate, a manufacturing method for a circuit wire, and a manufacturing method for an electronic device. The transfer film of the present invention includes a temporary support a resin composition layer disposed on the temporary support, in which the resin composition layer contains a resin, and at least one compound selected from the group consisting of a block copolymer, which contains a block consisting of a constitutional unit X having a group represented by Formula (A) or a group represented by Formula (B) and a block a constitutional unit Y having a poly(oxyalkylene) group, and a compound represented by Formula (1).

A method for patterning a substrate includes: forming a first photoresist etch mask with an extreme ultraviolet (EUV) lithography process, the first photoresist etch mask including first through openings, the first photoresist etch mask including a metal-based photoresist material; forming a second photoresist etch mask over the first photoresist etch mask, the second photoresist etch mask including second through openings; and forming first openings, through the first and the second photoresist etch masks, in a region of the substrate that vertically overlaps both the first through openings and the second through openings.

A method for patterning a substrate includes: forming a first photoresist etch mask with an extreme ultraviolet (EUV) lithography process, the first photoresist etch mask including first through openings, the first photoresist etch mask including a metal-based photoresist material; forming a second photoresist etch mask over the first photoresist etch mask, the second photoresist etch mask including second through openings; and forming first openings, through the first and the second photoresist etch masks, in a region of the substrate that vertically overlaps both the first through openings and the second through openings.

Techniques regarding lithographic processes for fabricating Josephson junctions are provided. For example, one or more embodiments described herein can comprise a method that can include depositing a first resist layer onto a second resist layer. The first resist layer can include a bridge portion that defines an opening for forming a Josephson junction. The method can also comprise depositing a third resist layer onto the bridge portion. The third resist layer can shield the opening from an angled deposition of a superconducting material during fabrication of the Josephson junction.

The present disclosure relates to the technical field of semiconductors, and provides a method of processing a photoresist layer, and a photoresist layer. The method of processing a photoresist layer includes: forming a photoresist layer on a target layer, where the photoresist layer includes a first part close to the target layer and a second part away from the target layer; performing first exposure processing on the photoresist layer, and forming an exposure image in the first part of the photoresist layer; processing the second part of the photoresist layer by using a first process, such that the second part forms a third part, where a photosensitivity of the third part is higher than that of the first part; and stripping the third part.

The present disclosure relates to the technical field of semiconductors, and provides a method of forming a photoresist pattern, and a photoresist structure. The method of forming a photoresist pattern includes: forming a photoresist structure on a target layer, where the photoresist structure includes a photoresist layer provided on the target layer, and an optical wave transmission layer provided on the photoresist layer; and performing exposure processing on the photoresist structure in a first medium, to form an exposure image in the photoresist layer, where the optical wave transmission layer is configured to improve lithographic resolution of the photoresist layer.

The present disclosure relates to the technical field of semiconductors, and provides a method of processing a photoresist layer, and a photoresist layer. The method of processing a photoresist layer includes: forming a photoresist layer on a target layer, where the photoresist layer includes a first part away from the target layer and a second part close to the target layer; processing the photoresist layer by using a first process, such that a light absorption rate of the first part is less than a light absorption rate of the second part; performing first exposure processing on the photoresist layer to form an exposure image in the second part; and stripping the first part and performing first development processing on the photoresist layer, to pattern the second part into a photoresist pattern.

Photodefinable alignment layers for chemical assisted patterning and approaches for forming photodefinable alignment layers for chemical assisted patterning are described. An embodiment of the invention may include disposing a chemically amplified resist (CAR) material over a hardmask that includes a switch component. The CAR material may then be exposed to form exposed resist portions. The exposure may produces acid in the exposed portions of the CAR material that interact with the switch component to form modified regions of the hardmask material below the exposed resist portions.

A method of forming a pattern of a semiconductor device includes: forming a first mask pattern comprising first mask lines extending in a first direction in a cell region and second mask lines extending in the first direction in a first core region, the first mask pattern covering a second core region; forming, on the first mask pattern, a second mask pattern comprising third mask lines extending in a second direction in the cell region and fourth mask lines extending in the second direction in the second core region, the second mask pattern covering the first core region; and forming a third mask pattern by using the second mask pattern, the third mask pattern comprising island-type masks in the cell region, fifth mask lines extending in the first direction in the first core region, and sixth mask lines extending in the second direction in the second core region.

A method of forming a pattern of a semiconductor device includes: forming a first mask pattern comprising first mask lines extending in a first direction in a cell region and second mask lines extending in the first direction in a first core region, the first mask pattern covering a second core region; forming, on the first mask pattern, a second mask pattern comprising third mask lines extending in a second direction in the cell region and fourth mask lines extending in the second direction in the second core region, the second mask pattern covering the first core region; and forming a third mask pattern by using the second mask pattern, the third mask pattern comprising island-type masks in the cell region, fifth mask lines extending in the first direction in the first core region, and sixth mask lines extending in the second direction in the second core region.