An edge exposure tool may include a lens adjustment device that is capable of automatically adjusting various parameters of an edge exposure lens to account for changes in operating parameters of the edge exposure tool. In some implementations, the edge exposure tool may also include a controller that is capable of determining edge adjustment parameters for the edge exposure lens and exposure control parameters for the edge exposure tool using techniques such as big data mining, machine learning, and neural network processing. The lens adjustment device and the controller are capable of reducing and/or preventing the performance of the edge exposure tool from drifting out of tolerance, which may maintain the operation performance of the edge exposure tool and reduce the likelihood of wafer scratching, and may reduce the down-time of the edge exposure tool that would otherwise be caused by cleaning and calibration of the edge exposure lens.

Techniques and arrangements for performing exposure operations on a wafer utilizing both a stepper apparatus and an aligner apparatus. The exposure operations are performed with respect to large composite base dies, e.g., interposers, defined within the wafer, where the interposers will become a part of microelectronic devices by coupling with active dies or microchips. The composite base dies may be coupled to the active dies via “native interconnects” utilizing direct bonding techniques. The stepper apparatus may be used to perform exposure operations on active regions of the composite base dies to provide a fine pitch for the native interconnects, while the aligner apparatus may be used to perform exposure operations on inactive regions of the composite base dies to provide a coarse pitch for interfaces with passive regions of the composite base dies.

An edge exposure tool may include a lens adjustment device that is capable of automatically adjusting various parameters of an edge exposure lens to account for changes in operating parameters of the edge exposure tool. In some implementations, the edge exposure tool may also include a controller that is capable of determining edge adjustment parameters for the edge exposure lens and exposure control parameters for the edge exposure tool using techniques such as big data mining, machine learning, and neural network processing. The lens adjustment device and the controller are capable of reducing and/or preventing the performance of the edge exposure tool from drifting out of tolerance, which may maintain the operation performance of the edge exposure tool and reduce the likelihood of wafer scratching, and may reduce the down-time of the edge exposure tool that would otherwise be caused by cleaning and calibration of the edge exposure lens.

A method and apparatus for forming a resist pattern may be provided. In the method for forming a resist pattern, a resist layer may be formed on a base layer, an electric field may be applied to the resist layer in a thickness direction of the resist layer, and a portion of the resist layer may be exposed with extreme ultraviolet (EUV) light while applying the electric field. A lithography apparatus for performing the method of forming a resist pattern may include at least an exposure part and an electric field forming part. The exposure part may be configured to expose a portion of the resist layer with extreme ultraviolet (EUV) light. The electric field forming part may be configured to apply an electric field to the resist layer.

A method of preparing a film negative including the steps of dispersing a UV ink in a desired pattern on a UV printing substrate; and curing the UV ink with a source of actinic radiation to crosslink and cure the UV ink and create the UV printed polymer layer in the desired pattern. The UV ink is at least substantially solvent-free and printing substrate does not contain an adhesive layer or an ink-receptive layer and is not been modified to be ink-receptive. The film negative may be used in a process of making a flexographic printing element.

A transfer-printable (e.g., micro-transfer-printable) device source wafer comprises a growth substrate comprising a growth material, a plurality of device structures comprising one or more device materials different from the growth material, the device structures disposed on and laterally spaced apart over the growth substrate, each device structure comprising a device, and a patterned dissociation interface disposed between each device structure of the plurality of device structures and the growth substrate. The growth material is more transparent to a desired frequency of electromagnetic radiation than at least one of the one or more device materials. The patterned dissociation interface has one or more areas of relatively greater adhesion each defining an anchor between the growth substrate and a device structure of the plurality of device structures and one or more dissociated areas of relatively lesser adhesion between the growth substrate and the device structure of the plurality of device structures.

The invention provides a light generating method and system, the method including: generating first light, the first light being capable of forming a first area, a second area, and a third area, and intensity of the first light in the first area being higher than that in the second area and the third area, respectively; generating second light, the second light being capable of simultaneously irradiating the first area and the second area; generating third light, the third light being capable of simultaneously irradiating the first area and the third area; and controlling intensity of the second light and the third light, respectively. The light generating method and system provided by the invention can not only generate light having a super-resolution that may approach infinitesimal in theory but also employ light output by a laser as the only original light source, featuring extremely low costs and freedom from the diffraction limit of the light source, showing a great prospect of applications in the field of lithography.

Semiconductor processing apparatuses and methods are provided in which a semiconductor wafer is flipped and then rotated between patterning of front and back sides of the semiconductor wafer by first and second reticles, respectively. In some embodiments, a method includes patterning, by a first reticle, a first layer on a first side of a semiconductor wafer while the first side of the semiconductor wafer is facing a first direction. The semiconductor wafer is then flipped. A second side of the semiconductor wafer that is opposite the first side faces the first direction after the flipping the semiconductor wafer. The semiconductor wafer is then rotated about a rotational axis extending along the first direction, and a second layer on the second side of the semiconductor wafer is patterned by a second reticle.

A method includes forming a first photomask including N mask chip regions and a first mask scribe lane region surrounding each of the N mask chip regions, forming a second photomask including M mask chip regions and a second mask scribe lane region surrounding each of the M mask chip regions, performing a first semiconductor process including a first photolithography process using the first photomask on a semiconductor wafer; and performing a second semiconductor process including a second photolithography process using the second photomask on the semiconductor wafer. The first photolithography process is an extreme ultraviolet (EUV) photolithography process, the first photomask is an EUV photomask, N is a natural number of 2 or more, and M is two times N.

Semiconductor processing apparatuses and methods are provided in which a semiconductor wafer is flipped and then rotated between patterning of front and back sides of the semiconductor wafer by first and second reticles, respectively. In some embodiments, a method includes patterning, by a first reticle, a first layer on a first side of a semiconductor wafer while the first side of the semiconductor wafer is facing a first direction. The semiconductor wafer is then flipped. A second side of the semiconductor wafer that is opposite the first side faces the first direction after the flipping the semiconductor wafer. The semiconductor wafer is then rotated about a rotational axis extending along the first direction, and a second layer on the second side of the semiconductor wafer is patterned by a second reticle.