Patent classifications
G03F7/427
MICRON PATTERNED SILICONE HARD-COATED POLYMER (SHC-P) SURFACES
In this invention use of silicone hard-coated polycarbonate (SHC-PC) as direct photo definable, thermally, chemically and optically stable polymer that can be patterned using conventional microfabrication and drying etching process is reported. As a result of the increased resistance to thermal and chemical deformations and flow of the silicone hard-coated polycarbonate (SHC-PC), it has been shown for the first time that the illustrated process herein to be compatible with a variety of conventional thin film deposition, micro and nano fabrication approaches such as metal evaporation, photoresist deposition/developing and electroplating that are typically incompatible to polycarbonate. As such high optical clarity surfaces with ultra-hydrophobic-hydrophilic properties with well-defined micro and nano patterned surface features of high surface roughness were fabricated with high fidelity.
Conductive film and method of making same
A method for making a conductive film includes the steps of: depositing a conductive metal film on a substrate to form a metal-coated substrate; depositing a fiber pattern on the conductive metal film of the metal-coated substrate to form a masked substrate, the fiber pattern defining protected metal and exposed metal of the conductive metal film; removing the exposed metal from the conductive metal film of the masked substrate to form a protected conductive film; and removing the fiber pattern from the protected conductive film to expose the protected metal and provide a metal pattern on the substrate. An annealing step con be employed after depositing the fiber pattern to increase the surface area of contact between the fiber pattern and the conductive metal film.
ETCHING SUBSTRATES USING ALE AND SELECTIVE DEPOSITION
Methods of and apparatuses for processing substrates having carbon-containing material using atomic layer deposition and selective deposition are provided. Methods involve exposing a carbon-containing material on a substrate to an oxidant and igniting a first plasma at a first bias power to modify a surface of the substrate and exposing the modified surface to an inert plasma at a second bias power to remove the modified surface. Methods also involve selectively depositing a second carbon-containing material onto the substrate. ALE and selective deposition may be performed without breaking vacuum.
Plasma generation and pulsed plasma etching
One or more plasma etching techniques are provided. Selective plasma etching is achieved by introducing a gas into a chamber containing a photoresist over a substrate, establishing a bias at a frequency to convert the gas to a plasma at the frequency, and using the plasma to etch the photoresist. The frequency controls an electron density of the plasma and by maintaining a low electron density causes free radicals of the plasma to chemically etch the photoresist, rather than physically etching using ion bombardment. A mechanism is thus provided for chemically etching a photoresist under what are typically physical etching conditions.
Methods for processing a workpiece using fluorine radicals
Methods for processing a workpiece with fluorine radicals are provided. In one example implementation, the method includes a workpiece having at least one silicon layer and at least one silicon germanium layer. The method can include placing the workpiece on a workpiece support in a processing chamber. The method can include generating one or more species from a process gas in a plasma chamber. The method can include filtering the one or more species to create a filtered mixture. The method can include exposing the workpiece to the filtered mixture to remove at least a portion of the at least one silicon layer.
Plasma etcher design with effective no-damage in-situ ash
In some embodiments, the present disclosure relates to a plasma etching system having direct and localized plasma sources in communication with a processing chamber. The direct plasma is operated to provide a direct plasma to the processing chamber for etching a semiconductor workpiece. The direct plasma has a high potential, formed by applying a large bias voltage to the workpiece. After etching is completed the bias voltage and direct plasma source are turned off. The localized plasma source is then operated to provide a low potential, localized plasma to a position within the processing chamber that is spatially separated from the workpiece. The spatial separation results in formation of a diffused plasma having a zero/low potential that is in contact with the workpiece. The zero/low potential of the diffused plasma allows for reactive ashing to be performed, while mitigating workpiece damage resulting from ion bombardment caused by positive plasma potentials.
Method for Manufacturing Pillar or Hole Structures in a Layer of a Semiconductor Device, and Associated Semiconductor Structure
The present disclosure relates to a method for manufacturing pillar or hole structures in a layer of semiconductor device, and associated semiconductor structure. At least one embodiment relates to a method for manufacturing pillar structures in a layer of a semiconductor device. The pillar structures are arranged at positions forming a hexagonal matrix configuration. The method includes embedding alignment pillar structures in a backfill brush polymer layer. The method also includes providing a BCP layer on a substantially planar surface defined by an upper surface of the alignment pillar structures and the backfill brush polymer layer. Further, the method includes inducing polymer microphase separation of the BCP polymer layer into pillar structures of a first component of the BCP polymer layer embedded in a second component of the BCP polymer layer.
Implanted Photoresist Stripping Process
Processes for removing a photoresist from a substrate after, for instance, ion implantation are provided. In one example implementation, a process can include placing a substrate having a bulk photoresist and a crust formed on the bulk photoresist in a processing chamber. The process can include initiating a first strip process in the processing chamber. The process can include accessing an optical emission signal associated with a plasma during the first strip process. The process can include identifying an endpoint for the first strip process based at least in part on the optical emission signal. The process can include terminating the first strip process based at least in part on the endpoint. The process can include initiating a second strip process to remove the photoresist from the substrate.
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE
Disclosed is a method for manufacturing a semiconductor device, including a step of yielding a pattern 2a of a polysiloxane-containing composition over a substrate 1, and a step of forming an ion impurity region 6 in the substrate, wherein, after the step of forming an ion impurity region, the method further includes a step of firing the pattern at a temperature of 300 to 1,500° C. This method makes it possible that after the formation of the ion impurity region in the semiconductor substrate, the pattern 2a of the polysiloxane-containing composition is easily removed without leaving any residual. Thus, the yield in the production of a semiconductor device can be improved and the tact time can be shortened.
METHOD AND DEVICE FOR LOCALLY REMOVING AND/OR MODIFYING A POLYMER MATERIAL ON A SURFACE
A method for locally removing/modifying a polymer material on a surface of a wafer. The method includes: a) aligning a mask with respect to the surface; b) locally exposing the surface through the mask using a VUV light source while simultaneously supplying a gas mixture containing at least oxygen; c) purging the surface with a gas mixture containing at least nitrogen and oxygen, the VUV light source being switched off; and d) repeating at least steps b) and c) until the removal/modification is complete. A device is described for locally removing/modifying a polymer material on a surface of a wafer, including a mask. The device includes an adjustable wafer table for holding the wafer, and is configured to set an exposure gap between the wafer and the mask in a first operating state, and to set a purge gap between the wafer and the mask in a second operating state.