Patent classifications
G03F7/70466
Layer Class Relative Density for Technology Modeling in IC Technology
A method and apparatus of a novel modeling scheme for performing optical lithography simulation for a multi-color layer fabrication process is described. The method interpolates for simulation use between test or experimental data or descriptions to more accurately apply color differentiated parameters to the model creation and lithography simulation.
Metrology apparatus and method for determining a characteristic of one or more structures on a substrate
Disclosed is a method and associated inspection apparatus for measuring a characteristic of interest relating to a structure on a substrate. The inspection apparatus uses measurement radiation comprising a plurality of wavelengths. The method comprises performing a plurality of measurement acquisitions of said structure, each measurement acquisition being performed using measurement radiation comprising a different subset of the plurality of wavelengths, to obtain a plurality of multiplexed measurement signals. The plurality of multiplexed measurement signals are subsequently de-multiplexed into signal components according to each of said plurality of wavelengths, to obtain a plurality of de-multiplexed measurement signals which are separated according to wavelength.
MASK, MANUFACTURING METHOD THEREOF, PATTERNING METHOD EMPLOYING MASK, OPTICAL FILTER
A mask, a manufacturing method thereof, and a patterning method employing the mask. In the mask, a plurality of masks can be combined into one mask. The pattern area (01) of the mask is provided with a first pattern section (10) and a second pattern section (20) which are not overlapped with each other; light of a first wavelength can run through the first pattern section (10) but light of a second wavelength cannot run through the first pattern section; the light of the second wavelength can run thorough the second pattern section (20) but the light of the first wavelength cannot run through the second pattern section; and the light of the first wavelength and the light of the second wavelength can run through the non-pattern area, or any of the light of the first wavelength and the light of the second wavelength cannot run through the non-pattern area. The mask is obtained by combining a plurality of masks.
Method for determining mask pattern, non-transitory recording medium, and information processing apparatus
A method which determines patterns for a plurality of masks to be executed by a processor includes acquiring data on a pattern containing a plurality of pattern elements, and assigning the acquired plurality of pattern elements into masks, decomposing the acquired plurality of pattern elements into patterns of the masks, and calculating an evaluation value for an evaluation index, based on a number of masks, the distances between a plurality of pattern elements in each mask, and an angle of a line connecting a plurality of pattern elements in each mask. In the method, a pattern of each mask is determined based on the calculated evaluation value.
Method, system, and computer program product for improving mask designs and manufacturability of electronic designs for multi-exposure lithography
Methods and systems for enhancing electronic designs for improving mask designs and manufacturability of electronic circuit designs for multi-exposure lithography are disclosed. The methods identify gap rectangles in a design and create gap blocks with the some of the identified gap rectangles according to at least their positions in a design and design rules. A relation graph is determined among the gap blocks or gap rectangles. The methods adjust some gap blocks by altering their sizes or dimensions. Some gap blocks may be split into multiple smaller gap blocks. The methods convert some gap rectangles into metal fill(s) and/or metal extensions to generate a structured physical design based at least in part upon the gap blocks and/or the multiple smaller gap blocks.
Mechanisms for forming patterns using multiple lithography processes
The present disclosure provides a method for forming patterns in a semiconductor device. The method includes providing a substrate and a patterning-target layer over the substrate; patterning the patterning-target layer to form a main pattern; forming a middle layer over the patterning-target layer and a hard mask layer over the middle layer; patterning the hard mask layer to form a first cut pattern; patterning the hard mask layer to form a second cut pattern, a combined cut pattern being formed in the hard mask layer as a union of the first cut pattern and the second cut pattern; transferring the combined cut pattern to the middle layer; etching the patterning-target layer using the middle layer as an etching mask to form a final pattern in the patterning-target layer. In some embodiments, the final pattern includes the main pattern subtracting an intersection portion between main pattern and the combined cut pattern.
METHOD OF MANUFACTURING A MASTER FOR A REPLICATION PROCESS
A method of manufacturing a master for use in a wafer-scale replication process is disclosed. The method comprises at least one step of forming a layer of photoresist on a substrate and exposing the layer of photoresist to a radiation pattern to form at least one patterned layer. The method also comprises a step of developing the at least one patterned layer to provide one or more structures defining the master. In an embodiment, the at least one step of forming the layer of photoresist comprises a process of dry film lamination.
Method and apparatus for determining positions of a plurality of pixels to be introduced in a substrate of a photolithographic mask
The present invention refers to a method and an apparatus for determining positions of a plurality of pixels to be introduced into a substrate of a photolithographic mask by use of a laser system, wherein the pixels serve to at least partly correct one or more errors of the photolithographic mask. The method comprises the steps: (a) obtaining error data associated with the one or more errors; (b) obtaining first parameters of an illumination system, the first parameters determining an illumination of the photolithographic mask of the illumination system when processing a wafer by illuminating with the illumination system using the photolithographic mask; and (c) determining the positions of the plurality of pixels based on the error data and the first parameters.
Critical dimension correction via calibrated trim dosing
Techniques herein include processes and systems by which a reproducible CD variation pattern can be mitigated or corrected to yield desirable CDs from microfabrication patterning processes, via resolution enhancement. A repeatable portion of CD variation across a set of wafers is identified, and then a correction exposure pattern is generated. A direct-write projection system exposes this correction pattern on a substrate as a component exposure, augmentation exposure, or partial exposure. A conventional mask-based photolithographic system executes a primary patterning exposure as a second or main component exposure. The two component exposures when combined enhance resolution of the patterning exposure to improve CDs on the substrate being processed without measure each wafer.
SYSTEM AND METHOD FOR DOUBLE-SIDED DIGITAL LITHOGRAPHY OR EXPOSURE
A double-sided digital lithography or exposure system and method are provided. The system includes a first optical engine 110 for exposing a front side of a substrate 910, a second optical engine 120 for exposing the back side of the substrate 910, a control system 710 for generating a first exposure pattern and a second exposure pattern aligned on the front and back surfaces of the substrate 910 based on the position information of the first optical engine 110 and the second optical engine 120, and controlling the first optical engine 110 and the second optical engine 120 to expose the front and back surfaces of the substrate 910 with the first exposure pattern and the second exposure pattern.