Implementations of the present disclosure provide coloring methods that sort and pre-color nodes of G0-linked networks in a multiple-patterning technology (MPT)-compliant layout design by coordinate. In one embodiment, a method includes identifying target networks in a circuit layout, each target network having two or more linked nodes representing circuit patterns, and each target network being presented in an imaginary X-Y coordinate plane, assigning a first feature to a first node in each target network, the first node is determined using a coordinate-based method, and assigning the first feature and a second feature to remaining nodes in each target network in an alternating manner so that any two immediately adjacent linked nodes in each target network have different features.

A method of manufacturing a printed circuit board includes: forming first and second resist films, respectively having first and second openings exposing a first metal layer disposed on one surface of an insulating layer; forming a second metal layer on the first metal layer, exposed through the first and second openings, to fill at least a portion of each of the first and second openings; and removing the first and second resist films. The first and second openings have different widths in a cross-section.

A lithographic system and a method for exposing a substrate are provided. The method includes providing a plurality of mask sets. Each mask set includes complementary masks corresponding to a respective pattern. The method further comprises exposing the substrate with the plurality of mask sets. A stitch location between the complementary masks of a mask set is different than a stitch location between the complementary masks of each other mask set of the plurality of mask sets.

Embodiments described herein relate to methods of printing double exposure patterns in a lithography environment. The methods include determining a second exposure pattern to be exposed with a first exposure pattern in a lithography process. The second exposure pattern is determined with a rule-based process flow or a lithography model process flow.

Implementations of the present disclosure provide coloring methods that sort and pre-color nodes of G0-linked networks in a multiple-patterning technology (MPT)-compliant layout design by coordinate. In one embodiment, a method includes identifying target networks in a circuit layout, each target network having two or more linked nodes representing circuit patterns, and each target network being presented in an imaginary X-Y coordinate plane, assigning a first feature to a first node in each target network, the first node is determined using a coordinate-based method, and assigning the first feature and a second feature to remaining nodes in each target network in an alternating manner so that any two immediately adjacent linked nodes in each target network have different features.

Methods for patterning a substrate are described. A substrate is scanned using a spatial light modulator with a plurality of exposures timed according to a non-crystalline shot pattern. Lithography systems for performing the substrate patterning method and non-transitory computer-readable medium for executing the patterning method are also described.

Aspects of the present disclosure provide an imaging system. For example, in the imaging system a first light source can generate a first light beam of a first wavelength, a second light source can generate a second light beam of a second wavelength, the second light beam having power sufficient to pass through at least a portion of a thickness of a wafer, an alignment module can coaxially align the second light beam with the first light beam, a coaxial module can focus the coaxially aligned first and second light beams onto a first pattern located on a front side of the wafer and a second pattern located below the first pattern, respectively, and an image capturing module can capture a first image of the first pattern and a second image of the second pattern. The second image can be captured via quantum tunneling imaging or infrared (IR) transmission imaging.

Implementations of the present disclosure provide coloring methods that sort and pre-color nodes of G0-linked networks in a multiple-patterning technology (MPT)-compliant layout design by coordinate. In one embodiment, a method includes identifying target networks in a circuit layout, each target network having two or more linked nodes representing circuit patterns, and each target network being presented in an imaginary X-Y coordinate plane, assigning a first feature to a first node in each target network, the first node is determined using a coordinate-based method, and assigning the first feature and a second feature to remaining nodes in each target network in an alternating manner so that any two immediately adjacent linked nodes in each target network have different features.

A method of patterning a substrate includes forming a multilayer photoresist stack on a substrate. The multilayer photoresist stack includes a first layer of a wet photoresist deposited by spin-on deposition, and a second layer of a dry photoresist deposited by vapor deposition. The first layer is positioned over the second layer. A first relief pattern is formed in the first layer by exposure to a first pattern of actinic radiation of a first wavelength and development of developable portions of the first layer using a first development process. The first relief pattern uncovers portions of the second layer. A multi-color layer of the first relief pattern is formed. The multi-color layer includes the wet photoresist and a third material that is different from the wet photoresist and the dry photoresist. A selective patterning process is executed for uncovered portions of one or two of the wet photoresist, the dry photoresist and the third material.

A method of patterning a substrate includes forming a multilayer photoresist stack on a substrate. The multilayer photoresist stack includes a dry photoresist layer, deposited by vapor deposition, over a wet photoresist layer deposited by spin-on deposition. A first relief pattern is formed in the wet photoresist layer by exposure to a first pattern of actinic radiation of a first wavelength and development of developable portions of the wet photoresist layer using a first development process. The first relief pattern uncovers portions of the dry photoresist layer. A second relief pattern is formed in the dry photoresist layer by exposure to a second pattern of actinic radiation of a second wavelength and development of developable portions of the dry photoresist layer using a second development process. The developable portions of the dry photoresist layer are defined by the second pattern of actinic radiation and the first relief pattern.