Systems and methods discussed herein relate to patterning substrates during lithography and microlithography to form features to a set or sets of critical dimensions using dose. The dose maps are generated based upon images captured during manufacturing to account for process variation in a plurality of operations employed to pattern the substrates. The dose maps are used along with imaging programs to tune the voltages applied to various regions of a substrate in order to produce features to a set or sets of critical dimensions and compensate for upstream or downstream operations that may otherwise result in incorrect critical dimension formation.

A digital exposure machine and an exposure control method thereof are disclosed. The exposure control method of the digital exposure machine includes: determining a scanning direction of the digital exposure machine, wherein a plurality of sub-pixels in an array include multiple rows of sub-pixels arranged in the scanning direction, the multiple rows of sub-pixels including a first row of sub-pixels in the scanning direction; determining a starting scanning position, the starting scanning position being located on an outer side of the first row of sub-pixels in the scanning direction; and performing a plurality of scannings to expose a display region of the first display substrate to be exposed, wherein a scanning pitch for each of the plurality of scannings is integer times of a pitch of two adjacent rows of sub-pixels of the first display substrate in the scanning direction.

Systems and methods discussed herein relate to patterning substrates during lithography and microlithography to form features to a set or sets of critical dimensions using dose. The dose maps are generated based upon images captured during manufacturing to account for process variation in a plurality of operations employed to pattern the substrates. The dose maps are used along with imaging programs to tune the voltages applied to various regions of a substrate in order to produce features to a set or sets of critical dimensions and compensate for upstream or downstream operations that may otherwise result in incorrect critical dimension formation.

Embodiments of the present disclosure provide improved photolithography systems and methods using a solid state emitter device. The solid state emitter device includes an array of solid state emitters arranged in a plurality of horizontal rows and vertical columns. The variable intensity of each group of solid state emitters, for example an entire row or column of solid state emitters, is controllable for improved field brightness uniformity and stitching. Controlling the variable intensity includes, for example, varying the signal, such as voltage, that is applied to each of the rows of solid state emitters to attenuate the brightness from the middle of the array to the edges of the array to accommodate for overlapping exposures during photolithography processing.

A method of manufacture of objects including receiving a CAD file containing electrical circuit design data for direct writing on a surface, the CAD file including CAD data for a multiplicity of objects to be produced on the surface, automatically configuring a direct write machine to direct write direct writing data based on the CAD data on the surface in plural scans, each having a scan width less than a width of the surface, including arranging the direct writing data for the multiplicity of objects to be written in a side by side manner in each of the plural scans so as to be within the scan width, whereby stitching of direct writing data between adjacent scans is obviated and operating the direct write machine to create the multiplicity of objects on the surface.

Embodiments of the present disclosure generally relate to an image projection system. The image projection system includes an active matrix solid state emitter (SSE) device. The active matrix solid state emitter includes a substrate, a silicon layer, and a emitter substrate. The silicon layer is deposited over the substrate having a plurality of transistors formed therein. The emitter substrate is positioned between the silicon layer and the substrate. The emitter substrate comprises a plurality of emitter arrays. Each emitter array defines a pixel, wherein one pixel comprises one or more transistors from the plurality of transistors. Each transistor is configured to receive a variable amount of current.

A photomask according to an exemplary embodiment includes: a mask substrate; and a first test pattern and a second test pattern disposed along a first edge of the mask substrate, wherein the first test pattern has a first outer shape and a first inner shape, the second test pattern has a second outer shape, and the second outer shape of the second test pattern is larger than the first inner shape of the first test pattern and smaller than the first outer shape of the first test pattern.

A pattern decomposition method including following steps is provided. A target pattern is provided, wherein the target pattern includes first patterns and second patterns alternately arranged, and the width of the second pattern is greater than the width of the first pattern. Each of the second patterns is decomposed into a third pattern and a fourth pattern, wherein the third pattern and the fourth pattern have an overlapping portion, and a pattern formed by overlapping the third pattern and the fourth pattern is the same as the second pattern. The third patterns and the first pattern adjacent to the fourth pattern are designated as first photomask patterns of a first photomask. The fourth patterns and the first pattern adjacent to the third pattern are designated as second photomask patterns of a second photomask.

A method of forming patterned features on a substrate is provided. The method includes positioning a plurality of masks arranged in a mask layout over a substrate. The substrate is positioned in a first plane and the plurality of masks are positioned in a second plane, the plurality of masks in the mask layout have edges that each extend parallel to the first plane and parallel or perpendicular to an alignment feature on the substrate, the substrate includes a plurality of areas configured to be patterned by energy directed through the masks arranged in the mask layout. The method further includes directing energy towards the plurality of areas through the plurality of masks arranged in the mask layout over the substrate to form a plurality of patterned features in each of the plurality of areas.

An extreme ultraviolet lithography system (10) that creates a pattern (230) having a plurality of densely packed parallel lines (232) on a workpiece (22) includes a patterning element (16); an EUV illumination system (12) that directs an extreme ultraviolet beam (13A) at the patterning element (16); a projection optical assembly (18) that directs the extreme ultraviolet beam diffracted off of the patterning element (16) at the workpiece (22); and a pattern blind assembly (26) positioned in a beam path (55) of the extreme ultraviolet beam (13A). The pattern blind assembly (26) shapes the extreme ultraviolet beam (13A) so that an exposure field (28) on the workpiece (22) has a polygonal shape.