A determination apparatus has a calculation section, where first and second direction pitches intersecting within a predetermined plane of a plurality of detection areas are D.sub.1 and D.sub.2, respectively, sizes in the first and second directions of each of a plurality of divided areas arranged two-dimensionally along the first and second directions on a substrate are W.sub.1 and W.sub.2, respectively, and first and second direction pitches of a plurality of marks arranged on the substrate are p.sub.1 and p.sub.2, respectively, calculates pitch p1 and pitch p.sub.2 of the plurality of marks that satisfy formulas (a) and (b) below, based on pitch D.sub.1, pitch D.sub.2, size W.sub.1, and size W.sub.2.
p.sub.1=D.sub.1/i (i denotes a natural number)=W.sub.1/m (m denotes a natural number)  (a)
p.sub.2=D.sub.2/j (j denotes a natural number)=W.sub.2/n (n denotes a natural number)  (b)

An overlay error measurement structure includes a lower-layer pattern disposed over a substrate, and an upper-layer pattern disposed over the lower-layer pattern and at least partially overlapping with the lower-layer pattern. The lower-layer pattern includes a plurality of first sub-patterns extending in a first direction and being arranged in a second direction crossing the first direction. The upper-layer pattern includes a plurality of second sub-patterns extending in the first direction and being arranged in the second direction. At least one of a pattern pitch and a pattern width of at least one of at least a part of the first sub-patterns and at least a part of the second sub-patterns varies along the second direction.

In an optical circuit divided into a plurality of partial circuits, an optical waveguide having a low optical loss at a connection portion is provided. A photomask in which a waveguide pattern of an optical circuit is divided into a plurality of regions and drawn, the photomask including a waveguide pattern for drawing a joint region in which a waveguide width changes as a waveguide goes toward an outer peripheral portion, to connect a plurality of the waveguides divided and drawn to each other, in which the waveguides are connected to each other by overlapping the joint regions of two of the photomasks and performing exposure.

An alignment method includes directing an illumination beam with a first polarization state to form a diffracted beam with a second polarization state from an alignment target, and passing the diffracted beam through a polarization analyzer. The alignment method further includes measuring a polarization state of the diffracted beam and determining a location of the alignment target from the measured polarization state relative to its initial polarization state. The alignment target includes a plurality of diffraction gratings with a single pitch and two or more duty cycles, wherein the pitch is smaller than a wavelength of the illumination beam, and the location of the alignment target corresponds to the duty cycle of the diffraction grating.

Methods of fabricating and using an overlay mark are provided. In some embodiments, the overlay mark includes an upper layer and a lower layer disposed below the upper layer. The lower layer includes a first plurality of compound gratings extending in a first direction and disposed in a first region of the overlay mark, each of the first plurality of compound gratings including one first element and at least two second elements disposed on one side of the first element, and a second plurality of compound gratings extending the first direction and disposed in a second region of the overlay mark, each of the second plurality of compound gratings including one third element and at least two fourth elements on one side of the third element. The first plurality of compound gratings is a mirror image of the second plurality of compound gratings.

A semiconductor structure is provided, including several first patterns located in a photoresist layer with a thickness greater than 1.2 μm and arranged in a first direction, and several second patterns arranged in a second direction. The first direction and the second direction have an included angle. The first patterns have a first arrangement length in the first direction. The second patterns have a second arrangement length in the second direction. An area sum of the first patterns and the second patterns is less than ½ of a product of the first arrangement length and the second arrangement length.

The present invention provides a processing system that includes a first apparatus and a second apparatus, and processes a substrate, wherein the first apparatus includes a first measurement unit configured to detect a first structure and a second structure different from the first structure provided on the substrate, and measure a relative position between the first structure and the second structure, and the second apparatus includes an obtainment unit configured to obtain the relative position measured by the first measurement unit, a second measurement unit configured to detect the second structure and measure a position of the second structure, and a control unit configured to obtain a position of the first structure based on the relative position obtained by the obtainment unit and the position of the second structure measured by the second measurement unit.

There is disclosed a method of measuring a process parameter for a manufacturing process involving lithography. In a disclosed arrangement the method comprises performing first and second measurements of overlay error in a region on a substrate, and obtaining a measure of the process parameter based on the first and second measurements of overlay error. The first measurement of overlay error is designed to be more sensitive to a perturbation in the process parameter than the second measurement of overlay error by a known amount.

The method for manufacturing an integrated circuit includes: obtaining measurement data according to a first group of overlay marks on a first wafer, where the first group of overlay marks are disposed in a first region on the first wafer; obtaining a first parameter set according to a first model and the measurement data; and projecting the first parameter set into a second region on a second wafer to obtain simulated compensation data, where the second region includes a second group of overlay marks whose quantity is greater than that of the first group of overlay marks.

An alignment mark includes an alignment region, a peripheral region and a shielding region. The alignment region has an outer contour; the peripheral region is disposed around at least a part of the outer contour of the alignment region; the shielding region is disposed around at least a part of the outer contour of the alignment region and is non-overlapped with the peripheral region; and the alignment region and the shielding region are opaque, and the peripheral region is at least partially transparent.